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Commit dc37a9a0 authored by Leo (Sunpeng) Li's avatar Leo (Sunpeng) Li Committed by Alex Deucher
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Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"



This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.

We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.

Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarLeo (Sunpeng) Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 95f05a3a
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+1 −1
Original line number Original line Diff line number Diff line
@@ -2274,7 +2274,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
	case CHIP_VEGA10:
	case CHIP_VEGA10:
	case CHIP_VEGA12:
	case CHIP_VEGA12:
	case CHIP_VEGA20:
	case CHIP_VEGA20:
#ifdef CONFIG_X86
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
	case CHIP_RAVEN:
	case CHIP_RAVEN:
#endif
#endif
		return amdgpu_dc != 0;
		return amdgpu_dc != 0;
+8 −0
Original line number Original line Diff line number Diff line
@@ -9,6 +9,14 @@ config DRM_AMD_DC
	  support for AMDGPU. This adds required support for Vega and
	  support for AMDGPU. This adds required support for Vega and
	  Raven ASICs.
	  Raven ASICs.


config DRM_AMD_DC_DCN1_0
	bool "DCN 1.0 Raven family"
	depends on DRM_AMD_DC && X86
	default y
	help
	  Choose this option if you want to have
	  RV family for display engine

config DEBUG_KERNEL_DC
config DEBUG_KERNEL_DC
	bool "Enable kgdb break in DC"
	bool "Enable kgdb break in DC"
	depends on DRM_AMD_DC
	depends on DRM_AMD_DC
+4 −6
Original line number Original line Diff line number Diff line
@@ -58,9 +58,7 @@
#include <drm/drm_fb_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_edid.h>
#include <drm/drm_edid.h>


#include "modules/inc/mod_freesync.h"
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86
#include "ivsrcid/irqsrcs_dcn_1_0.h"
#include "ivsrcid/irqsrcs_dcn_1_0.h"


#include "dcn/dcn_1_0_offset.h"
#include "dcn/dcn_1_0_offset.h"
@@ -1192,7 +1190,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)
	return 0;
	return 0;
}
}


#ifdef CONFIG_X86
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
/* Register IRQ sources and initialize IRQ callbacks */
/* Register IRQ sources and initialize IRQ callbacks */
static int dcn10_register_irq_handlers(struct amdgpu_device *adev)
static int dcn10_register_irq_handlers(struct amdgpu_device *adev)
{
{
@@ -1532,7 +1530,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
			goto fail;
			goto fail;
		}
		}
		break;
		break;
#ifdef CONFIG_X86
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
	case CHIP_RAVEN:
	case CHIP_RAVEN:
		if (dcn10_register_irq_handlers(dm->adev)) {
		if (dcn10_register_irq_handlers(dm->adev)) {
			DRM_ERROR("DM: Failed to initialize IRQ\n");
			DRM_ERROR("DM: Failed to initialize IRQ\n");
@@ -1716,7 +1714,7 @@ static int dm_early_init(void *handle)
		adev->mode_info.num_dig = 6;
		adev->mode_info.num_dig = 6;
		adev->mode_info.plane_type = dm_plane_type_default;
		adev->mode_info.plane_type = dm_plane_type_default;
		break;
		break;
#ifdef CONFIG_X86
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
	case CHIP_RAVEN:
	case CHIP_RAVEN:
		adev->mode_info.num_crtc = 4;
		adev->mode_info.num_crtc = 4;
		adev->mode_info.num_hpd = 4;
		adev->mode_info.num_hpd = 4;
+1 −1
Original line number Original line Diff line number Diff line
@@ -25,7 +25,7 @@


DC_LIBS = basics bios calcs dce gpio i2caux irq virtual
DC_LIBS = basics bios calcs dce gpio i2caux irq virtual


ifdef CONFIG_X86
ifdef CONFIG_DRM_AMD_DC_DCN1_0
DC_LIBS += dcn10 dml
DC_LIBS += dcn10 dml
endif
endif


+1 −1
Original line number Original line Diff line number Diff line
@@ -55,7 +55,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2(
	case DCE_VERSION_11_22:
	case DCE_VERSION_11_22:
		*h = dal_cmd_tbl_helper_dce112_get_table2();
		*h = dal_cmd_tbl_helper_dce112_get_table2();
		return true;
		return true;
#ifdef CONFIG_X86
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
	case DCN_VERSION_1_0:
	case DCN_VERSION_1_0:
		*h = dal_cmd_tbl_helper_dce112_get_table2();
		*h = dal_cmd_tbl_helper_dce112_get_table2();
		return true;
		return true;
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