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Commit dc26aec2 authored by Michael Hennerich's avatar Michael Hennerich Committed by Bryan Wu
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Blackfin arch: BF538/9 Linux kernel Support



Add supporing for Blackfin BF538 and BF539 processors.

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent f940260a
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+19 −7
Original line number Diff line number Diff line
@@ -137,6 +137,16 @@ config BF537
	help
	  BF537 Processor Support.

config BF538
	bool "BF538"
	help
	  BF538 Processor Support.

config BF539
	bool "BF539"
	help
	  BF539 Processor Support.

config BF542
	bool "BF542"
	help
@@ -174,12 +184,13 @@ config BF_REV_MIN
	default 0 if (BF52x || BF54x)
	default 2 if (BF537 || BF536 || BF534)
	default 3 if (BF561 ||BF533 || BF532 || BF531)
	default 4 if (BF538 || BF539)	

config BF_REV_MAX
	int
	default 2 if (BF52x || BF54x)
	default 3 if (BF537 || BF536 || BF534)
	default 5 if (BF561)
	default 5 if (BF561|| BF538 || BF539)
	default 6 if (BF533 || BF532 || BF531)

choice
@@ -206,11 +217,11 @@ config BF_REV_0_3

config BF_REV_0_4
	bool "0.4"
	depends on (BF561 || BF533 || BF532 || BF531)
	depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539)

config BF_REV_0_5
	bool "0.5"
	depends on (BF561 || BF533 || BF532 || BF531)
	depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539)

config BF_REV_0_6
	bool "0.6"
@@ -258,7 +269,7 @@ config MEM_MT48LC16M16A2TG_75

config MEM_MT48LC32M8A2_75
	bool
	depends on (BFIN537_STAMP || PNAV10)
	depends on (BFIN537_STAMP || PNAV10 || BFIN538_EZKIT)
	default y

config MEM_MT48LC8M32B2B5_7
@@ -275,6 +286,7 @@ source "arch/blackfin/mach-bf527/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
source "arch/blackfin/mach-bf538/Kconfig"
source "arch/blackfin/mach-bf548/Kconfig"

menu "Board customizations"
@@ -318,7 +330,7 @@ config CLKIN_HZ
	int "Frequency of the crystal on the board in Hz"
	default "11059200" if BFIN533_STAMP
	default "27000000" if BFIN533_EZKIT
	default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)
	default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT)
	default "30000000" if BFIN561_EZKIT
	default "24576000" if PNAV10
	default "10000000" if BFIN532_IP0X
@@ -354,7 +366,7 @@ config VCO_MULT
	range 1 64
	default "22" if BFIN533_EZKIT
	default "45" if BFIN533_STAMP
	default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
	default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
	default "22" if BFIN533_BLUETECHNIX_CM
	default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
	default "20" if BFIN561_EZKIT
@@ -716,7 +728,7 @@ config BFIN_GPTIMERS

config BFIN_DMA_5XX
	bool "Enable DMA Support"
	depends on (BF52x || BF53x || BF561 || BF54x)
	depends on (BF52x || BF53x || BF561 || BF54x || BF538 || BF539)
	default y
	help
	  DMA driver for BF5xx.
+4 −0
Original line number Diff line number Diff line
@@ -33,6 +33,8 @@ machine-$(CONFIG_BF533) := bf533
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF538) := bf538
machine-$(CONFIG_BF539) := bf538
machine-$(CONFIG_BF542) := bf548
machine-$(CONFIG_BF544) := bf548
machine-$(CONFIG_BF547) := bf548
@@ -54,6 +56,8 @@ cpu-$(CONFIG_BF533) := bf533
cpu-$(CONFIG_BF534) := bf534
cpu-$(CONFIG_BF536) := bf536
cpu-$(CONFIG_BF537) := bf537
cpu-$(CONFIG_BF538) := bf538
cpu-$(CONFIG_BF539) := bf539
cpu-$(CONFIG_BF542) := bf542
cpu-$(CONFIG_BF544) := bf544
cpu-$(CONFIG_BF547) := bf547
+1288 −0

File added.

Preview size limit exceeded, changes collapsed.

+68 −0
Original line number Diff line number Diff line
@@ -165,6 +165,74 @@

#endif

#if defined(BF538_FAMILY)
	/* FIXME:
	 * For now only support PORTF GPIOs.
	 * PORT C,D and E are for peripheral usage only
	 */
#define MAX_BLACKFIN_GPIOS 16

#define	GPIO_PF0	0	/* PF */
#define	GPIO_PF1	1
#define	GPIO_PF2	2
#define	GPIO_PF3	3
#define	GPIO_PF4	4
#define	GPIO_PF5	5
#define	GPIO_PF6	6
#define	GPIO_PF7	7
#define	GPIO_PF8	8
#define	GPIO_PF9	9
#define	GPIO_PF10	10
#define	GPIO_PF11	11
#define	GPIO_PF12	12
#define	GPIO_PF13	13
#define	GPIO_PF14	14
#define	GPIO_PF15	15
#define	GPIO_PC0	16	/* PC */
#define	GPIO_PC1	17
#define	GPIO_PC4	20
#define	GPIO_PC5	21
#define	GPIO_PC6	22
#define	GPIO_PC7	23
#define	GPIO_PC8	24
#define	GPIO_PC9	25
#define	GPIO_PD0	32	/* PD */
#define	GPIO_PD1	33
#define	GPIO_PD2	34
#define	GPIO_PD3	35
#define	GPIO_PD4	36
#define	GPIO_PD5	37
#define	GPIO_PD6	38
#define	GPIO_PD7	39
#define	GPIO_PD8	40
#define	GPIO_PD9	41
#define	GPIO_PD10      	42
#define	GPIO_PD11      	43
#define	GPIO_PD12      	44
#define	GPIO_PD13      	45
#define	GPIO_PE0	48	/* PE */
#define	GPIO_PE1	49
#define	GPIO_PE2	50
#define	GPIO_PE3	51
#define	GPIO_PE4	52
#define	GPIO_PE5	53
#define	GPIO_PE6	54
#define	GPIO_PE7	55
#define	GPIO_PE8	56
#define	GPIO_PE9	57
#define	GPIO_PE10      	58
#define	GPIO_PE11      	59
#define	GPIO_PE12      	60
#define	GPIO_PE13      	61
#define	GPIO_PE14      	62
#define	GPIO_PE15      	63

#define PORT_F GPIO_PF0
#define PORT_C GPIO_PC0
#define PORT_D GPIO_PD0
#define PORT_E GPIO_PE0
#endif

#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#define MAX_BLACKFIN_GPIOS 48

+5 −1
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ enum {
#define AWA_DUMMY_READ(...)  do { } while (0)
#endif

#ifdef BF533_FAMILY
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
	(struct gpio_port_t *) FIO_FLAG_D,
};
@@ -202,6 +202,10 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
#endif

#ifdef BF538_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB};
#endif

#ifdef BF527_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
#endif
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