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Commit dc0fa718 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: remove duplicated SDVO/HDMI bit definitions 



Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c20cd312

drivers/gpu/drm/i915/i915_reg.h

+6 −11
Original line number Diff line number Diff line
@@ -1693,6 +1693,8 @@ 


/* Gen 3 SDVO bits: */

#define   SDVO_ENABLE				(1 << 31)

#define   SDVO_PIPE_SEL(pipe)			((pipe) << 30)

#define   SDVO_PIPE_SEL_MASK			(1 << 30)

#define   SDVO_PIPE_B_SELECT			(1 << 30)

#define   SDVO_STALL_SELECT			(1 << 29)

#define   SDVO_INTERRUPT_ENABLE			(1 << 26)
@@ -1719,7 +1721,8 @@ 
#define   COLOR_FORMAT_8bpc			(0 << 26)

#define   SDVO_ENCODING_SDVO			(0 << 10)

#define   SDVO_ENCODING_HDMI			(2 << 10)

#define   SDVO_NULL_PACKETS_DURING_VSYNC	(1 << 9) /* HDMI only */

#define   HDMI_MODE_SELECT_HDMI			(1 << 9) /* HDMI only */

#define   HDMI_MODE_SELECT_DVI			(0 << 9) /* HDMI only */

#define   SDVO_COLOR_RANGE_16_235		(1 << 8) /* HDMI only */

#define   SDVO_AUDIO_ENABLE			(1 << 6)

/* VSYNC/HSYNC bits new with 965, default is to be set */
@@ -1731,16 +1734,8 @@ 
#define   SDVOB_HOTPLUG_ENABLE			(1 << 23) /* SDVO only */



/* Gen 6 (CPT) SDVO/HDMI bits: */

#define   TRANSCODER_CPT(pipe)			((pipe) << 29)

#define   TRANSCODER_MASK_CPT			(3 << 29)



/* Repeated but still used bits: */

#define   PORT_ENABLE				(1 << 31)

#define   TRANSCODER(pipe)			((pipe) << 30)

#define   TRANSCODER_MASK			(1 << 30)

#define   HDMI_MODE_SELECT			(1 << 9)

#define   DVI_MODE_SELECT			(0 << 9)

#define   PORT_DETECTED				(1 << 2)

#define   SDVO_PIPE_SEL_CPT(pipe)		((pipe) << 29)

#define   SDVO_PIPE_SEL_MASK_CPT		(3 << 29)





/* DVO port control */

drivers/gpu/drm/i915/intel_display.c

+9 −9
Original line number Diff line number Diff line
@@ -1340,14 +1340,14 @@ static bool dp_pipe_enabled(struct drm_i915_private *dev_priv, 
static bool hdmi_pipe_enabled(struct drm_i915_private *dev_priv,

			      enum pipe pipe, u32 val)

{

	if ((val & PORT_ENABLE) == 0)

	if ((val & SDVO_ENABLE) == 0)

		return false;



	if (HAS_PCH_CPT(dev_priv->dev)) {

		if ((val & PORT_TRANS_SEL_MASK) != PORT_TRANS_SEL_CPT(pipe))

		if ((val & SDVO_PIPE_SEL_MASK_CPT) != SDVO_PIPE_SEL_CPT(pipe))

			return false;

	} else {

		if ((val & TRANSCODER_MASK) != TRANSCODER(pipe))

		if ((val & SDVO_PIPE_SEL_MASK) != SDVO_PIPE_SEL(pipe))

			return false;

	}

	return true;
@@ -1405,7 +1405,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, 
	     "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",

	     reg, pipe_name(pipe));



	WARN(HAS_PCH_IBX(dev_priv->dev) && (val & PORT_ENABLE) == 0

	WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_ENABLE) == 0

	     && (val & SDVO_PIPE_B_SELECT),

	     "IBX PCH hdmi port still using transcoder B\n");

}
@@ -8352,7 +8352,7 @@ static void intel_setup_outputs(struct drm_device *dev) 
		if (has_edp_a(dev))

			intel_dp_init(dev, DP_A, PORT_A);



		if (I915_READ(PCH_HDMIB) & PORT_DETECTED) {

		if (I915_READ(PCH_HDMIB) & SDVO_DETECTED) {

			/* PCH SDVOB multiplex with HDMIB */

			found = intel_sdvo_init(dev, PCH_SDVOB, true);

			if (!found)
@@ -8361,10 +8361,10 @@ static void intel_setup_outputs(struct drm_device *dev) 
				intel_dp_init(dev, PCH_DP_B, PORT_B);

		}



		if (I915_READ(PCH_HDMIC) & PORT_DETECTED)

		if (I915_READ(PCH_HDMIC) & SDVO_DETECTED)

			intel_hdmi_init(dev, PCH_HDMIC, PORT_C);



		if (!dpd_is_edp && I915_READ(PCH_HDMID) & PORT_DETECTED)

		if (!dpd_is_edp && I915_READ(PCH_HDMID) & SDVO_DETECTED)

			intel_hdmi_init(dev, PCH_HDMID, PORT_D);



		if (I915_READ(PCH_DP_C) & DP_DETECTED)
@@ -8377,14 +8377,14 @@ static void intel_setup_outputs(struct drm_device *dev) 
		if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED)

			intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);



		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & PORT_DETECTED) {

		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & SDVO_DETECTED) {

			intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIB,

					PORT_B);

			if (I915_READ(VLV_DISPLAY_BASE + DP_B) & DP_DETECTED)

				intel_dp_init(dev, VLV_DISPLAY_BASE + DP_B, PORT_B);

		}



		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & PORT_DETECTED)

		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & SDVO_DETECTED)

			intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC,

					PORT_C);

drivers/gpu/drm/i915/intel_hdmi.c

+9 −14
Original line number Diff line number Diff line
@@ -615,20 +615,20 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, 


	/* Required on CPT */

	if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))

		hdmi_val |= HDMI_MODE_SELECT;

		hdmi_val |= HDMI_MODE_SELECT_HDMI;



	if (intel_hdmi->has_audio) {

		DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",

				 pipe_name(intel_crtc->pipe));

		hdmi_val |= SDVO_AUDIO_ENABLE;

		hdmi_val |= SDVO_NULL_PACKETS_DURING_VSYNC;

		hdmi_val |= HDMI_MODE_SELECT_HDMI;

		intel_write_eld(encoder, adjusted_mode);

	}



	if (HAS_PCH_CPT(dev))

		hdmi_val |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);

	else if (intel_crtc->pipe == PIPE_B)

		hdmi_val |= SDVO_PIPE_B_SELECT;

		hdmi_val |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);

	else

		hdmi_val |= SDVO_PIPE_SEL(intel_crtc->pipe);



	I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);

	POSTING_READ(intel_hdmi->hdmi_reg);
@@ -661,6 +661,7 @@ static void intel_enable_hdmi(struct intel_encoder *encoder) 
{

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);

	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);

	u32 temp;

	u32 enable_bits = SDVO_ENABLE;
@@ -671,15 +672,9 @@ static void intel_enable_hdmi(struct intel_encoder *encoder) 
	temp = I915_READ(intel_hdmi->hdmi_reg);



	/* HW workaround for IBX, we need to move the port to transcoder A

	 * before disabling it. */

	if (HAS_PCH_IBX(dev)) {

		struct drm_crtc *crtc = encoder->base.crtc;

		int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;



		/* Restore the transcoder select bit. */

		if (pipe == PIPE_B)

			enable_bits |= SDVO_PIPE_B_SELECT;

	}

	 * before disabling it, so restore the transcoder select bit here. */

	if (HAS_PCH_IBX(dev))

		enable_bits |= SDVO_PIPE_SEL(intel_crtc->pipe);



	/* HW workaround, need to toggle enable bit off and on for 12bpc, but

	 * we do this anyway which shows more stable in testing.

drivers/gpu/drm/i915/intel_sdvo.c

+5 −11
Original line number Diff line number Diff line
@@ -1193,9 +1193,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, 
	}



	if (INTEL_PCH_TYPE(dev) >= PCH_CPT)

		sdvox |= TRANSCODER_CPT(intel_crtc->pipe);

		sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);

	else

		sdvox |= TRANSCODER(intel_crtc->pipe);

		sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);



	if (intel_sdvo->has_hdmi_audio)

		sdvox |= SDVO_AUDIO_ENABLE;
@@ -1305,15 +1305,9 @@ static void intel_enable_sdvo(struct intel_encoder *encoder) 
	temp = I915_READ(intel_sdvo->sdvo_reg);

	if ((temp & SDVO_ENABLE) == 0) {

		/* HW workaround for IBX, we need to move the port

		 * to transcoder A before disabling it. */

		if (HAS_PCH_IBX(dev)) {

			struct drm_crtc *crtc = encoder->base.crtc;

			int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;



			/* Restore the transcoder select bit. */

			if (pipe == PIPE_B)

				temp |= SDVO_PIPE_B_SELECT;

		}

		 * to transcoder A before disabling it, so restore it here. */

		if (HAS_PCH_IBX(dev))

			temp |= SDVO_PIPE_SEL(intel_crtc->pipe);



		intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);

	}