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Commit db860b2f authored by Puranam V G Tejaswi's avatar Puranam V G Tejaswi
Browse files

msm: kgsl: set bit 24 of CP_CHICKEN_DBG for A702



A702 HLSQ doesn't have context buffer for third context. So
set the bit 24, which is HLSQCluster3ContextDis, of
CP_CHICKEN_DBG for A702.

Change-Id: I1ca75e1725670ef65baccf3a4e6c731550b93dd7
Signed-off-by: default avatarPuranam V G Tejaswi <pvgtejas@codeaurora.org>
parent dcc90d4a
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+7 −0
Original line number Original line Diff line number Diff line
@@ -581,6 +581,13 @@ static void a6xx_start(struct adreno_device *adreno_dev)
	if (a6xx_core->disable_tseskip)
	if (a6xx_core->disable_tseskip)
		kgsl_regrmw(device, A6XX_PC_DBG_ECO_CNTL, 0, (1 << 9));
		kgsl_regrmw(device, A6XX_PC_DBG_ECO_CNTL, 0, (1 << 9));


	/*
	 * Set the bit HLSQCluster3ContextDis for A702 as HLSQ doesn't
	 * have context buffer for third context
	 */
	if (adreno_is_a702(adreno_dev))
		kgsl_regwrite(device, A6XX_CP_CHICKEN_DBG, (1 << 24));

	/* Enable the GMEM save/restore feature for preemption */
	/* Enable the GMEM save/restore feature for preemption */
	if (adreno_is_preemption_enabled(adreno_dev))
	if (adreno_is_preemption_enabled(adreno_dev))
		kgsl_regwrite(device, A6XX_RB_CONTEXT_SWITCH_GMEM_SAVE_RESTORE,
		kgsl_regwrite(device, A6XX_RB_CONTEXT_SWITCH_GMEM_SAVE_RESTORE,