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Commit db6dd7f4 authored by Taniya Das's avatar Taniya Das
Browse files

dt-bindings: rpmcc: Add RPM clocks IDs for clients 



Add all the clocks which are required to be supported on rpmcc bengal for
clients to be able to request for the same.

Change-Id: I3c70862c63e42ad3582fab475d558ff797571c96
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent db51ec75

include/dt-bindings/clock/qcom,rpmcc.h

+145 −66
Original line number Diff line number Diff line
@@ -57,71 +57,150 @@ 
#define RPM_SMD_BIMC_A_CLK				7

#define RPM_SMD_QDSS_CLK				8

#define RPM_SMD_QDSS_A_CLK				9

#define RPM_SMD_BB_CLK1				10

#define RPM_SMD_BB_CLK1_A				11

#define RPM_SMD_BB_CLK2				12

#define RPM_SMD_BB_CLK2_A				13

#define RPM_SMD_RF_CLK1				14

#define RPM_SMD_RF_CLK1_A				15

#define RPM_SMD_RF_CLK2				16

#define RPM_SMD_RF_CLK2_A				17

#define RPM_SMD_BB_CLK1_PIN				18

#define RPM_SMD_BB_CLK1_A_PIN			19

#define RPM_SMD_BB_CLK2_PIN				20

#define RPM_SMD_BB_CLK2_A_PIN			21

#define RPM_SMD_RF_CLK1_PIN				22

#define RPM_SMD_RF_CLK1_A_PIN			23

#define RPM_SMD_RF_CLK2_PIN				24

#define RPM_SMD_RF_CLK2_A_PIN			25

#define RPM_SMD_PNOC_CLK			26

#define RPM_SMD_PNOC_A_CLK			27

#define RPM_SMD_CNOC_CLK			28

#define RPM_SMD_CNOC_A_CLK			29

#define RPM_SMD_MMSSNOC_AHB_CLK			30

#define RPM_SMD_MMSSNOC_AHB_A_CLK		31

#define RPM_SMD_GFX3D_CLK_SRC			32

#define RPM_SMD_GFX3D_A_CLK_SRC			33

#define RPM_SMD_OCMEMGX_CLK			34

#define RPM_SMD_OCMEMGX_A_CLK			35

#define RPM_SMD_CXO_D0				36

#define RPM_SMD_CXO_D0_A			37

#define RPM_SMD_CXO_D1				38

#define RPM_SMD_CXO_D1_A			39

#define RPM_SMD_CXO_A0				40

#define RPM_SMD_CXO_A0_A			41

#define RPM_SMD_CXO_A1				42

#define RPM_SMD_CXO_A1_A			43

#define RPM_SMD_CXO_A2				44

#define RPM_SMD_CXO_A2_A			45

#define RPM_SMD_DIV_CLK1			46

#define RPM_SMD_DIV_A_CLK1			47

#define RPM_SMD_DIV_CLK2			48

#define RPM_SMD_DIV_A_CLK2			49

#define RPM_SMD_DIFF_CLK			50

#define RPM_SMD_DIFF_A_CLK			51

#define RPM_SMD_CXO_D0_PIN			52

#define RPM_SMD_CXO_D0_A_PIN			53

#define RPM_SMD_CXO_D1_PIN			54

#define RPM_SMD_CXO_D1_A_PIN			55

#define RPM_SMD_CXO_A0_PIN			56

#define RPM_SMD_CXO_A0_A_PIN			57

#define RPM_SMD_CXO_A1_PIN			58

#define RPM_SMD_CXO_A1_A_PIN			59

#define RPM_SMD_CXO_A2_PIN			60

#define RPM_SMD_CXO_A2_A_PIN			61

#define RPM_SMD_AGGR1_NOC_CLK			62

#define RPM_SMD_AGGR1_NOC_A_CLK			63

#define RPM_SMD_AGGR2_NOC_CLK			64

#define RPM_SMD_AGGR2_NOC_A_CLK			65

#define RPM_SMD_MMAXI_CLK			66

#define RPM_SMD_MMAXI_A_CLK			67

#define RPM_SMD_IPA_CLK				68

#define RPM_SMD_IPA_A_CLK			69

#define RPM_SMD_CE1_CLK				70

#define RPM_SMD_CE1_A_CLK			71

#define RPM_SMD_DIV_CLK3			72

#define RPM_SMD_DIV_A_CLK3			73

#define RPM_SMD_LN_BB_CLK			74

#define RPM_SMD_LN_BB_A_CLK			75

#define RPM_SMD_IPA_CLK				10

#define RPM_SMD_IPA_A_CLK				11

#define RPM_SMD_QUP_CLK				12

#define RPM_SMD_QUP_A_CLK				13

#define RPM_SMD_MMRT_CLK				14

#define RPM_SMD_MMRT_A_CLK				15

#define RPM_SMD_MMNRT_CLK				16

#define RPM_SMD_MMNRT_A_CLK				17

#define RPM_SMD_SNOC_PERIPH_CLK				18

#define RPM_SMD_SNOC_PERIPH_A_CLK				19

#define RPM_SMD_SNOC_LPASS_CLK				20

#define RPM_SMD_SNOC_LPASS_A_CLK				21

#define RPM_SMD_BB_CLK1				22

#define RPM_SMD_BB_CLK1_A				23

#define RPM_SMD_BB_CLK2					24

#define RPM_SMD_BB_CLK2_A				25

#define RPM_SMD_RF_CLK1				26

#define RPM_SMD_RF_CLK1_A				27

#define RPM_SMD_RF_CLK2				28

#define RPM_SMD_RF_CLK2_A				29

#define RPM_SMD_BB_CLK1_PIN				30

#define RPM_SMD_BB_CLK1_A_PIN			31

#define RPM_SMD_BB_CLK2_PIN				32

#define RPM_SMD_BB_CLK2_A_PIN			33

#define RPM_SMD_RF_CLK1_PIN				34

#define RPM_SMD_RF_CLK1_A_PIN			35

#define RPM_SMD_RF_CLK2_PIN				36

#define RPM_SMD_RF_CLK2_A_PIN			37

#define RPM_SMD_PNOC_CLK			38

#define RPM_SMD_PNOC_A_CLK			39

#define RPM_SMD_CNOC_CLK			40

#define RPM_SMD_CNOC_A_CLK			41

#define RPM_SMD_MMSSNOC_AHB_CLK			42

#define RPM_SMD_MMSSNOC_AHB_A_CLK		43

#define RPM_SMD_GFX3D_CLK_SRC			44

#define RPM_SMD_GFX3D_A_CLK_SRC			45

#define RPM_SMD_OCMEMGX_CLK			46

#define RPM_SMD_OCMEMGX_A_CLK			47

#define RPM_SMD_CXO_D0				48

#define RPM_SMD_CXO_D0_A			49

#define RPM_SMD_CXO_D1				50

#define RPM_SMD_CXO_D1_A			51

#define RPM_SMD_CXO_A0				52

#define RPM_SMD_CXO_A0_A			53

#define RPM_SMD_CXO_A1				54

#define RPM_SMD_CXO_A1_A			55

#define RPM_SMD_CXO_A2				56

#define RPM_SMD_CXO_A2_A			57

#define RPM_SMD_DIV_CLK1			58

#define RPM_SMD_DIV_A_CLK1			59

#define RPM_SMD_DIV_CLK2			60

#define RPM_SMD_DIV_A_CLK2			61

#define RPM_SMD_DIFF_CLK			62

#define RPM_SMD_DIFF_A_CLK			63

#define RPM_SMD_CXO_D0_PIN			64

#define RPM_SMD_CXO_D0_A_PIN			65

#define RPM_SMD_CXO_D1_PIN			66

#define RPM_SMD_CXO_D1_A_PIN			67

#define RPM_SMD_CXO_A0_PIN			68

#define RPM_SMD_CXO_A0_A_PIN			69

#define RPM_SMD_CXO_A1_PIN			70

#define RPM_SMD_CXO_A1_A_PIN			71

#define RPM_SMD_CXO_A2_PIN			72

#define RPM_SMD_CXO_A2_A_PIN			73

#define RPM_SMD_QPIC_CLK			74

#define RPM_SMD_QPIC_A_CLK			75

#define RPM_SMD_CE1_CLK				76

#define RPM_SMD_CE1_A_CLK			77

#define RPM_SMD_BIMC_GPU_CLK				78

#define RPM_SMD_BIMC_GPU_A_CLK				79

#define RPM_SMD_LN_BB_CLK			80

#define RPM_SMD_LN_BB_CLK_A			81

#define RPM_SMD_LN_BB_CLK_PIN			82

#define RPM_SMD_LN_BB_CLK_A_PIN			83

#define RPM_SMD_RF_CLK3				84

#define RPM_SMD_RF_CLK3_A			85

#define RPM_SMD_RF_CLK3_PIN			86

#define RPM_SMD_RF_CLK3_A_PIN			87

#define RPM_SMD_LN_BB_CLK1				88

#define RPM_SMD_LN_BB_CLK1_A				89

#define RPM_SMD_LN_BB_CLK2				90

#define RPM_SMD_LN_BB_CLK2_A				91

#define RPM_SMD_LN_BB_CLK3				92

#define RPM_SMD_LN_BB_CLK3_A				93

#define PNOC_MSMBUS_CLK				94

#define PNOC_MSMBUS_A_CLK			95

#define PNOC_KEEPALIVE_A_CLK			96

#define SNOC_MSMBUS_CLK				97

#define SNOC_MSMBUS_A_CLK			98

#define BIMC_MSMBUS_CLK				99

#define BIMC_MSMBUS_A_CLK			100

#define PNOC_USB_CLK				101

#define PNOC_USB_A_CLK				102

#define SNOC_USB_CLK				103

#define SNOC_USB_A_CLK				104

#define BIMC_USB_CLK				105

#define BIMC_USB_A_CLK				106

#define SNOC_WCNSS_A_CLK			107

#define BIMC_WCNSS_A_CLK			108

#define MCD_CE1_CLK				109

#define QCEDEV_CE1_CLK				110

#define QCRYPTO_CE1_CLK				111

#define QSEECOM_CE1_CLK				112

#define SCM_CE1_CLK				113

#define CXO_SMD_OTG_CLK				114

#define CXO_SMD_LPM_CLK				115

#define CXO_SMD_PIL_PRONTO_CLK			116

#define CXO_SMD_PIL_MSS_CLK			117

#define CXO_SMD_WLAN_CLK			118

#define CXO_SMD_PIL_LPASS_CLK			119

#define CXO_SMD_PIL_CDSP_CLK			120

#define CNOC_MSMBUS_CLK				121

#define CNOC_MSMBUS_A_CLK				122

#define CNOC_KEEPALIVE_A_CLK				123

#define SNOC_KEEPALIVE_A_CLK				124

#define CPP_MMNRT_MSMBUS_CLK				125

#define CPP_MMNRT_MSMBUS_A_CLK				126

#define JPEG_MMNRT_MSMBUS_CLK				127

#define JPEG_MMNRT_MSMBUS_A_CLK				128

#define VENUS_MMNRT_MSMBUS_CLK				129

#define VENUS_MMNRT_MSMBUS_A_CLK			130

#define ARM9_MMNRT_MSMBUS_CLK				131

#define ARM9_MMNRT_MSMBUS_A_CLK				132

#define MDP_MMRT_MSMBUS_CLK				133

#define MDP_MMRT_MSMBUS_A_CLK				134

#define VFE_MMRT_MSMBUS_CLK				135

#define VFE_MMRT_MSMBUS_A_CLK				136

#define QUP0_MSMBUS_SNOC_PERIPH_CLK			137

#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK			138

#define QUP1_MSMBUS_SNOC_PERIPH_CLK			139

#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK			140

#define QUP2_MSMBUS_SNOC_PERIPH_CLK                     141

#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK                   142

#define DAP_MSMBUS_SNOC_PERIPH_CLK			143

#define DAP_MSMBUS_SNOC_PERIPH_A_CLK			144

#define SDC1_MSMBUS_SNOC_PERIPH_CLK			145

#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK			146

#define SDC2_MSMBUS_SNOC_PERIPH_CLK			147

#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK			148

#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK			149

#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK			150

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK			151

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK		152

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK			153

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK		154



#endif