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Commit db14d0c5 authored by Sagar Arun Kamble's avatar Sagar Arun Kamble Committed by Chris Wilson
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drm/i915/guc: Update name and prototype of GuC submission interface functions 



i915 GuC submission is hardware interface and GuC APIs that are not user
facing should be named intel_guc* hence we change GuC submission related
functions name prefix to intel_guc. Also changed the parameter to these
functions to intel_guc struct.

v2: Using local guc variable in intel_uc_fini_hw. (Michal Wajdeczko)
Rebase.

Suggested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1510839162-25197-4-git-send-email-sagar.a.kamble@intel.com


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 6fa1f6fb

drivers/gpu/drm/i915/i915_guc_submission.c

+6 −9
Original line number Diff line number Diff line
@@ -1253,9 +1253,8 @@ static void guc_preempt_work_destroy(struct intel_guc *guc) 
 * Set up the memory resources to be shared with the GuC (via the GGTT)

 * at firmware loading time.

 */

int i915_guc_submission_init(struct drm_i915_private *dev_priv)

int intel_guc_submission_init(struct intel_guc *guc)

{

	struct intel_guc *guc = &dev_priv->guc;

	int ret;



	if (guc->stage_desc_pool)
@@ -1302,10 +1301,8 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv) 
	return ret;

}



void i915_guc_submission_fini(struct drm_i915_private *dev_priv)

void intel_guc_submission_fini(struct intel_guc *guc)

{

	struct intel_guc *guc = &dev_priv->guc;



	guc_ads_destroy(guc);

	guc_preempt_work_destroy(guc);

	intel_guc_log_destroy(guc);
@@ -1391,9 +1388,9 @@ static void guc_submission_unpark(struct intel_engine_cs *engine) 
	intel_engine_pin_breadcrumbs_irq(engine);

}



int i915_guc_submission_enable(struct drm_i915_private *dev_priv)

int intel_guc_submission_enable(struct intel_guc *guc)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct drm_i915_private *dev_priv = guc_to_i915(guc);

	struct intel_engine_cs *engine;

	enum intel_engine_id id;

	int err;
@@ -1451,9 +1448,9 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv) 
	return err;

}



void i915_guc_submission_disable(struct drm_i915_private *dev_priv)

void intel_guc_submission_disable(struct intel_guc *guc)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct drm_i915_private *dev_priv = guc_to_i915(guc);



	GEM_BUG_ON(dev_priv->gt.awake); /* GT should be parked first */

drivers/gpu/drm/i915/i915_guc_submission.h

+4 −4
Original line number Diff line number Diff line
@@ -72,9 +72,9 @@ struct i915_guc_client { 
	u64 submissions[I915_NUM_ENGINES];

};



int i915_guc_submission_init(struct drm_i915_private *dev_priv);

int i915_guc_submission_enable(struct drm_i915_private *dev_priv);

void i915_guc_submission_disable(struct drm_i915_private *dev_priv);

void i915_guc_submission_fini(struct drm_i915_private *dev_priv);

int intel_guc_submission_init(struct intel_guc *guc);

int intel_guc_submission_enable(struct intel_guc *guc);

void intel_guc_submission_disable(struct intel_guc *guc);

void intel_guc_submission_fini(struct intel_guc *guc);



#endif

drivers/gpu/drm/i915/intel_uc.c

+9 −7
Original line number Diff line number Diff line
@@ -168,7 +168,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
		 * This is stuff we need to have available at fw load time

		 * if we are planning to enable submission later

		 */

		ret = i915_guc_submission_init(dev_priv);

		ret = intel_guc_submission_init(guc);

		if (ret)

			goto err_guc;

	}
@@ -217,7 +217,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
		if (i915_modparams.guc_log_level >= 0)

			gen9_enable_guc_interrupts(dev_priv);



		ret = i915_guc_submission_enable(dev_priv);

		ret = intel_guc_submission_enable(guc);

		if (ret)

			goto err_interrupts;

	}
@@ -246,7 +246,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
	guc_capture_load_err_log(guc);

err_submission:

	if (i915_modparams.enable_guc_submission)

		i915_guc_submission_fini(dev_priv);

		intel_guc_submission_fini(guc);

err_guc:

	i915_ggtt_disable_guc(dev_priv);
@@ -271,19 +271,21 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 


void intel_uc_fini_hw(struct drm_i915_private *dev_priv)

{

	guc_free_load_err_log(&dev_priv->guc);

	struct intel_guc *guc = &dev_priv->guc;



	guc_free_load_err_log(guc);



	if (!i915_modparams.enable_guc_loading)

		return;



	if (i915_modparams.enable_guc_submission)

		i915_guc_submission_disable(dev_priv);

		intel_guc_submission_disable(guc);



	guc_disable_communication(&dev_priv->guc);

	guc_disable_communication(guc);



	if (i915_modparams.enable_guc_submission) {

		gen9_disable_guc_interrupts(dev_priv);

		i915_guc_submission_fini(dev_priv);

		intel_guc_submission_fini(guc);

	}



	i915_ggtt_disable_guc(dev_priv);