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Commit da5eb417 authored by Charles Keepax's avatar Charles Keepax Committed by Mark Brown
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ASoC: cs42l56: Make ID registers volatile and remove cache bypass 



Rather than manually enabling cache bypass when reading the ID registers
simply remove the default which will cause the first read to go to the
hardware. The old code worked this is simply the more standard way to
implement this.

Signed-off-by: default avatarCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: default avatarBrian Austin <brian.austin@cirrus.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1001354c

sound/soc/codecs/cs42l56.c

+0 −6
Original line number Diff line number Diff line
@@ -64,8 +64,6 @@ struct cs42l56_private { 
};



static const struct reg_default cs42l56_reg_defaults[] = {

	{ 1, 0x56 },	/* r01	- ID 1 */

	{ 2, 0x04 },	/* r02	- ID 2 */

	{ 3, 0x7f },	/* r03	- Power Ctl 1 */

	{ 4, 0xff },	/* r04	- Power Ctl 2 */

	{ 5, 0x00 },	/* ro5	- Clocking Ctl 1 */
@@ -1262,8 +1260,6 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client, 
		return ret;

	}



	regcache_cache_bypass(cs42l56->regmap, true);



	ret = regmap_read(cs42l56->regmap, CS42L56_CHIP_ID_1, &reg);

	devid = reg & CS42L56_CHIP_ID_MASK;

	if (devid != CS42L56_DEVID) {
@@ -1279,8 +1275,6 @@ static int cs42l56_i2c_probe(struct i2c_client *i2c_client, 
	dev_info(&i2c_client->dev, "Alpha Rev %X Metal Rev %X\n",

		 alpha_rev, metal_rev);



	regcache_cache_bypass(cs42l56->regmap, false);



	if (cs42l56->pdata.ain1a_ref_cfg)

		regmap_update_bits(cs42l56->regmap, CS42L56_AIN_REFCFG_ADC_MUX,

				   CS42L56_AIN1A_REF_MASK, 1);