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Commit d9cdeb81 authored by Inderpal Singh's avatar Inderpal Singh Committed by Kukjin Kim
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ARM: SAMSUNG: check processor type before cache restoration in resume 



Only cortex-a9 based samsung platforms have l2x0 cache controller. Hence check
the same before restoring the cache in resume.

This is needed for single kernel image.

Signed-off-by: default avatarInderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 1fa86dcf

arch/arm/plat-samsung/s5p-sleep.S

+9 −0
Original line number Original line Diff line number Diff line
@@ -25,6 +25,9 @@ 
#include <asm/asm-offsets.h>

#include <asm/asm-offsets.h>

#include <asm/hardware/cache-l2x0.h>

#include <asm/hardware/cache-l2x0.h>





#define CPU_MASK	0xff0ffff0

#define CPU_CORTEX_A9	0x410fc090



/*

/*

 *	 The following code is located into the .data section. This is to

 *	 The following code is located into the .data section. This is to

 *	 allow l2x0_regs_phys to be accessed with a relative load while we

 *	 allow l2x0_regs_phys to be accessed with a relative load while we
@@ -51,6 +54,12 @@ 




ENTRY(s3c_cpu_resume)

ENTRY(s3c_cpu_resume)

#ifdef CONFIG_CACHE_L2X0

#ifdef CONFIG_CACHE_L2X0

	mrc	p15, 0, r0, c0, c0, 0

	ldr	r1, =CPU_MASK

	and	r0, r0, r1

	ldr	r1, =CPU_CORTEX_A9

	cmp	r0, r1

	bne	resume_l2on

	adr	r0, l2x0_regs_phys

	adr	r0, l2x0_regs_phys

	ldr	r0, [r0]

	ldr	r0, [r0]

	ldr	r1, [r0, #L2X0_R_PHY_BASE]

	ldr	r1, [r0, #L2X0_R_PHY_BASE]