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Commit d96b428c authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu/gmc9: Add vega20 support 



Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a2c319b6

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+3 −0
Original line number Diff line number Diff line
@@ -752,6 +752,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) 
		switch (adev->asic_type) {

		case CHIP_VEGA10:  /* all engines support GPUVM */

		case CHIP_VEGA12:  /* all engines support GPUVM */

		case CHIP_VEGA20:

		default:

			adev->gmc.gart_size = 512ULL << 20;

			break;
@@ -857,6 +858,7 @@ static int gmc_v9_0_sw_init(void *handle) 
		break;

	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_VEGA20:

		/*

		 * To fulfill 4-level page support,

		 * vm size is 256TB (48bit), maximum size of Vega10,
@@ -974,6 +976,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) 


	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_VEGA20:

		soc15_program_register_sequence(adev,

						golden_settings_mmhub_1_0_0,

						ARRAY_SIZE(golden_settings_mmhub_1_0_0));