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Commit d8bbeb39 authored by Joao Pinto's avatar Joao Pinto Committed by Bjorn Helgaas
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PCI: designware: Wait for iATU enable 



Add a loop with timeout to make sure the iATU is really enabled before
subsequent config and I/O accesses.

[bhelgaas: split to separate patch, use dev_err() instead of dev_dbg()]
Signed-off-by: default avatarJoao Pinto <jpinto@synopsys.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent c388de1c

drivers/pci/host/pcie-designware.c

+15 −3
Original line number Diff line number Diff line
@@ -31,7 +31,12 @@ 
#define LINK_WAIT_USLEEP_MIN		90000

#define LINK_WAIT_USLEEP_MAX		100000



/* Synopsis specific PCIE configuration registers */

/* Parameters for the waiting for iATU enabled routine */

#define LINK_WAIT_MAX_IATU_RETRIES	5

#define LINK_WAIT_IATU_MIN		9000

#define LINK_WAIT_IATU_MAX		10000



/* Synopsys-specific PCIe configuration registers */

#define PCIE_PORT_LINK_CONTROL		0x710

#define PORT_LINK_MODE_MASK		(0x3f << 16)

#define PORT_LINK_MODE_1_LANES		(0x1 << 16)
@@ -157,7 +162,7 @@ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, 
static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,

		int type, u64 cpu_addr, u64 pci_addr, u32 size)

{

	u32 val;

	u32 retries, val;



	dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | index,

			  PCIE_ATU_VIEWPORT);
@@ -174,7 +179,14 @@ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index, 
	 * Make sure ATU enable takes effect before any subsequent config

	 * and I/O accesses.

	 */

	for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {

		val = dw_pcie_readl_rc(pp, PCIE_ATU_CR2);

		if (val == PCIE_ATU_ENABLE)

			return;



		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);

	}

	dev_err(pp->dev, "iATU is not being enabled\n");

}



static struct irq_chip dw_msi_irq_chip = {