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Commit d8b91dde authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull perf updates from Ingo Molnar:
 "Kernel side changes:

   - Clean up the x86 instruction decoder (Masami Hiramatsu)

   - Add new uprobes optimization for PUSH instructions on x86 (Yonghong
     Song)

   - Add MSR_IA32_THERM_STATUS to the MSR events (Stephane Eranian)

   - Fix misc bugs, update documentation, plus various cleanups (Jiri
     Olsa)

  There's a large number of tooling side improvements:

   - Intel-PT/BTS improvements (Adrian Hunter)

   - Numerous 'perf trace' improvements (Arnaldo Carvalho de Melo)

   - Introduce an errno code to string facility (Hendrik Brueckner)

   - Various build system improvements (Jiri Olsa)

   - Add support for CoreSight trace decoding by making the perf tools
     use the external openCSD (Mathieu Poirier, Tor Jeremiassen)

   - Add ARM Statistical Profiling Extensions (SPE) support (Kim
     Phillips)

   - libtraceevent updates (Steven Rostedt)

   - Intel vendor event JSON updates (Andi Kleen)

   - Introduce 'perf report --mmaps' and 'perf report --tasks' to show
     info present in 'perf.data' (Jiri Olsa, Arnaldo Carvalho de Melo)

   - Add infrastructure to record first and last sample time to the
     perf.data file header, so that when processing all samples in a
     'perf record' session, such as when doing build-id processing, or
     when specifically requesting that that info be recorded, use that
     in 'perf report --time', that also got support for percent slices
     in addition to absolute ones.

     I.e. now it is possible to ask for the samples in the 10%-20% time
     slice of a perf.data file (Jin Yao)

   - Allow system wide 'perf stat --per-thread', sorting the result (Jin
     Yao)

     E.g.:

      [root@jouet ~]# perf stat --per-thread --metrics IPC
      ^C
       Performance counter stats for 'system wide':

                  make-22229  23,012,094,032  inst_retired.any   #  0.8 IPC
                   cc1-22419     692,027,497  inst_retired.any   #  0.8 IPC
                   gcc-22418     328,231,855  inst_retired.any   #  0.9 IPC
                   cc1-22509     220,853,647  inst_retired.any   #  0.8 IPC
                   gcc-22486     199,874,810  inst_retired.any   #  1.0 IPC
                    as-22466     177,896,365  inst_retired.any   #  0.9 IPC
                   cc1-22465     150,732,374  inst_retired.any   #  0.8 IPC
                   gcc-22508     112,555,593  inst_retired.any   #  0.9 IPC
                   cc1-22487     108,964,079  inst_retired.any   #  0.7 IPC
       qemu-system-x86-2697       21,330,550  inst_retired.any   #  0.3 IPC
       systemd-journal-551        20,642,951  inst_retired.any   #  0.4 IPC
       docker-containe-17651       9,552,892  inst_retired.any   #  0.5 IPC
       dockerd-current-9809        7,528,586  inst_retired.any   #  0.5 IPC
                  make-22153  12,504,194,380  inst_retired.any   #  0.8 IPC
               python2-22429  12,081,290,954  inst_retired.any   #  0.8 IPC
      <SNIP>
               python2-22429  15,026,328,103  cpu_clk_unhalted.thread
                   cc1-22419     826,660,193  cpu_clk_unhalted.thread
                   gcc-22418     365,321,295  cpu_clk_unhalted.thread
                   cc1-22509     279,169,362  cpu_clk_unhalted.thread
                   gcc-22486     210,156,950  cpu_clk_unhalted.thread
      <SNIP>

           5.638075538 seconds time elapsed

     [root@jouet ~]#

   - Improve shell auto-completion of perf events (Jin Yao)

   - 'perf probe' improvements (Masami Hiramatsu)

   - Improve PMU infrastructure to support amp64's ThunderX2
     implementation defined core events (Ganapatrao Kulkarni)

   - Various annotation related improvements and fixes (Thomas Richter)

   - Clarify usage of 'overwrite' and 'backward' in the evlist/mmap
     code, removing the 'overwrite' parameter from several functions as
     it was always used it as 'false' (Wang Nan)

   - Fix/improve 'perf record' reverse recording support (Wang Nan)

   - Improve command line options documentation (Sihyeon Jang)

   - Optimize sample parsing for ordering events, where we don't need to
     parse all the PERF_SAMPLE_ bits, just the ones leading to the
     timestamp needed to reorder events (Jiri Olsa)

   - Generalize the annotation code to support other source information
     besides objdump/DWARF obtained ones, starting with python scripts,
     that will is slated to be merged soon (Jiri Olsa)

   - ... and a lot more that I failed to list, see the shortlog and
     changelog for details"

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (262 commits)
  perf trace beauty flock: Move to separate object file
  perf evlist: Remove fcntl.h from evlist.h
  perf trace beauty futex: Beautify FUTEX_BITSET_MATCH_ANY
  perf trace: Do not print from time delta for interrupted syscall lines
  perf trace: Add --print-sample
  perf bpf: Remove misplaced __maybe_unused attribute
  MAINTAINERS: Adding entry for CoreSight trace decoding
  perf tools: Add mechanic to synthesise CoreSight trace packets
  perf tools: Add full support for CoreSight trace decoding
  pert tools: Add queue management functionality
  perf tools: Add functionality to communicate with the openCSD decoder
  perf tools: Add support for decoding CoreSight trace data
  perf tools: Add decoder mechanic to support dumping trace data
  perf tools: Add processing of coresight metadata
  perf tools: Add initial entry point for decoder CoreSight traces
  perf tools: Integrating the CoreSight decoding library
  perf vendor events intel: Update IvyTown files to V20
  perf vendor events intel: Update IvyBridge files to V20
  perf vendor events intel: Update BroadwellDE events to V7
  perf vendor events intel: Update SkylakeX events to V1.06
  ...
parents 5e7481a2 e4c1091c

Documentation/process/kernel-enforcement-statement.rst

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ we might work for today, have in the past, or will in the future. 
  - Mike Marshall

  - Chris Mason

  - Paul E. McKenney

  - Arnaldo Carvalho de Melo

  - David S. Miller

  - Ingo Molnar

  - Kuninori Morimoto

MAINTAINERS

+2 −1
Original line number Diff line number Diff line
@@ -1327,7 +1327,8 @@ F: tools/perf/arch/arm/util/pmu.c 
F:	tools/perf/arch/arm/util/auxtrace.c

F:	tools/perf/arch/arm/util/cs-etm.c

F:	tools/perf/arch/arm/util/cs-etm.h

F:	tools/perf/util/cs-etm.h

F:	tools/perf/util/cs-etm.*

F:	tools/perf/util/cs-etm-decoder/*



ARM/CORGI MACHINE SUPPORT

M:	Richard Purdie <rpurdie@rpsys.net>

arch/x86/events/msr.c

+43 −27
Original line number Diff line number Diff line
@@ -10,7 +10,9 @@ enum perf_msr_id { 
	PERF_MSR_SMI			= 4,

	PERF_MSR_PTSC			= 5,

	PERF_MSR_IRPERF			= 6,



	PERF_MSR_THERM			= 7,

	PERF_MSR_THERM_SNAP		= 8,

	PERF_MSR_THERM_UNIT		= 9,

	PERF_MSR_EVENT_MAX,

};
@@ -29,6 +31,11 @@ static bool test_irperf(int idx) 
	return boot_cpu_has(X86_FEATURE_IRPERF);

}



static bool test_therm_status(int idx)

{

	return boot_cpu_has(X86_FEATURE_DTHERM);

}



static bool test_intel(int idx)

{

	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
@@ -102,6 +109,9 @@ PMU_EVENT_ATTR_STRING(pperf, evattr_pperf, "event=0x03"); 
PMU_EVENT_ATTR_STRING(smi,				evattr_smi,		"event=0x04"	);

PMU_EVENT_ATTR_STRING(ptsc,				evattr_ptsc,		"event=0x05"	);

PMU_EVENT_ATTR_STRING(irperf,				evattr_irperf,		"event=0x06"	);

PMU_EVENT_ATTR_STRING(cpu_thermal_margin,		evattr_therm,		"event=0x07"	);

PMU_EVENT_ATTR_STRING(cpu_thermal_margin.snapshot,	evattr_therm_snap,	"1"		);

PMU_EVENT_ATTR_STRING(cpu_thermal_margin.unit,		evattr_therm_unit,	"C"		);



static struct perf_msr msr[] = {

	[PERF_MSR_TSC]		= { 0,				&evattr_tsc,		NULL,			},
@@ -111,6 +121,9 @@ static struct perf_msr msr[] = { 
	[PERF_MSR_SMI]		= { MSR_SMI_COUNT,		&evattr_smi,		test_intel,		},

	[PERF_MSR_PTSC]		= { MSR_F15H_PTSC,		&evattr_ptsc,		test_ptsc,		},

	[PERF_MSR_IRPERF]	= { MSR_F17H_IRPERF,		&evattr_irperf,		test_irperf,		},

	[PERF_MSR_THERM]	= { MSR_IA32_THERM_STATUS,	&evattr_therm,		test_therm_status,	},

	[PERF_MSR_THERM_SNAP]	= { MSR_IA32_THERM_STATUS,	&evattr_therm_snap,	test_therm_status,	},

	[PERF_MSR_THERM_UNIT]	= { MSR_IA32_THERM_STATUS,	&evattr_therm_unit,	test_therm_status,	},

};



static struct attribute *events_attrs[PERF_MSR_EVENT_MAX + 1] = {
@@ -184,7 +197,7 @@ static void msr_event_update(struct perf_event *event) 
	u64 prev, now;

	s64 delta;



	/* Careful, an NMI might modify the previous event value. */

	/* Careful, an NMI might modify the previous event value: */

again:

	prev = local64_read(&event->hw.prev_count);

	now = msr_read_counter(event);
@@ -193,17 +206,22 @@ static void msr_event_update(struct perf_event *event) 
		goto again;



	delta = now - prev;

	if (unlikely(event->hw.event_base == MSR_SMI_COUNT))

	if (unlikely(event->hw.event_base == MSR_SMI_COUNT)) {

		delta = sign_extend64(delta, 31);



		local64_add(delta, &event->count);

	} else if (unlikely(event->hw.event_base == MSR_IA32_THERM_STATUS)) {

		/* If valid, extract digital readout, otherwise set to -1: */

		now = now & (1ULL << 31) ? (now >> 16) & 0x3f :  -1;

		local64_set(&event->count, now);

	} else {

		local64_add(delta, &event->count);

	}

}



static void msr_event_start(struct perf_event *event, int flags)

{

	u64 now;

	u64 now = msr_read_counter(event);



	now = msr_read_counter(event);

	local64_set(&event->hw.prev_count, now);

}
@@ -250,9 +268,7 @@ static int __init msr_init(void) 
	for (i = PERF_MSR_TSC + 1; i < PERF_MSR_EVENT_MAX; i++) {

		u64 val;



		/*

		 * Virt sucks arse; you cannot tell if a R/O MSR is present :/

		 */

		/* Virt sucks; you cannot tell if a R/O MSR is present :/ */

		if (!msr[i].test(i) || rdmsrl_safe(msr[i].msr, &val))

			msr[i].attr = NULL;

	}

arch/x86/include/asm/uprobes.h

+4 −0
Original line number Diff line number Diff line
@@ -53,6 +53,10 @@ struct arch_uprobe { 
			u8	fixups;

			u8	ilen;

		} 			defparam;

		struct {

			u8	reg_offset;	/* to the start of pt_regs */

			u8	ilen;

		}			push;

	};

};

arch/x86/kernel/uprobes.c

+103 −4
Original line number Diff line number Diff line
@@ -528,11 +528,11 @@ static int default_pre_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs) 
	return 0;

}



static int push_ret_address(struct pt_regs *regs, unsigned long ip)

static int emulate_push_stack(struct pt_regs *regs, unsigned long val)

{

	unsigned long new_sp = regs->sp - sizeof_long();



	if (copy_to_user((void __user *)new_sp, &ip, sizeof_long()))

	if (copy_to_user((void __user *)new_sp, &val, sizeof_long()))

		return -EFAULT;



	regs->sp = new_sp;
@@ -566,7 +566,7 @@ static int default_post_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs 
		regs->ip += correction;

	} else if (auprobe->defparam.fixups & UPROBE_FIX_CALL) {

		regs->sp += sizeof_long(); /* Pop incorrect return address */

		if (push_ret_address(regs, utask->vaddr + auprobe->defparam.ilen))

		if (emulate_push_stack(regs, utask->vaddr + auprobe->defparam.ilen))

			return -ERESTART;

	}

	/* popf; tell the caller to not touch TF */
@@ -655,7 +655,7 @@ static bool branch_emulate_op(struct arch_uprobe *auprobe, struct pt_regs *regs) 
		 *

		 * But there is corner case, see the comment in ->post_xol().

		 */

		if (push_ret_address(regs, new_ip))

		if (emulate_push_stack(regs, new_ip))

			return false;

	} else if (!check_jmp_cond(auprobe, regs)) {

		offs = 0;
@@ -665,6 +665,16 @@ static bool branch_emulate_op(struct arch_uprobe *auprobe, struct pt_regs *regs) 
	return true;

}



static bool push_emulate_op(struct arch_uprobe *auprobe, struct pt_regs *regs)

{

	unsigned long *src_ptr = (void *)regs + auprobe->push.reg_offset;



	if (emulate_push_stack(regs, *src_ptr))

		return false;

	regs->ip += auprobe->push.ilen;

	return true;

}



static int branch_post_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs)

{

	BUG_ON(!branch_is_call(auprobe));
@@ -703,6 +713,10 @@ static const struct uprobe_xol_ops branch_xol_ops = { 
	.post_xol = branch_post_xol_op,

};



static const struct uprobe_xol_ops push_xol_ops = {

	.emulate  = push_emulate_op,

};



/* Returns -ENOSYS if branch_xol_ops doesn't handle this insn */

static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn)

{
@@ -750,6 +764,87 @@ static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn) 
	return 0;

}



/* Returns -ENOSYS if push_xol_ops doesn't handle this insn */

static int push_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn)

{

	u8 opc1 = OPCODE1(insn), reg_offset = 0;



	if (opc1 < 0x50 || opc1 > 0x57)

		return -ENOSYS;



	if (insn->length > 2)

		return -ENOSYS;

	if (insn->length == 2) {

		/* only support rex_prefix 0x41 (x64 only) */

#ifdef CONFIG_X86_64

		if (insn->rex_prefix.nbytes != 1 ||

		    insn->rex_prefix.bytes[0] != 0x41)

			return -ENOSYS;



		switch (opc1) {

		case 0x50:

			reg_offset = offsetof(struct pt_regs, r8);

			break;

		case 0x51:

			reg_offset = offsetof(struct pt_regs, r9);

			break;

		case 0x52:

			reg_offset = offsetof(struct pt_regs, r10);

			break;

		case 0x53:

			reg_offset = offsetof(struct pt_regs, r11);

			break;

		case 0x54:

			reg_offset = offsetof(struct pt_regs, r12);

			break;

		case 0x55:

			reg_offset = offsetof(struct pt_regs, r13);

			break;

		case 0x56:

			reg_offset = offsetof(struct pt_regs, r14);

			break;

		case 0x57:

			reg_offset = offsetof(struct pt_regs, r15);

			break;

		}

#else

		return -ENOSYS;

#endif

	} else {

		switch (opc1) {

		case 0x50:

			reg_offset = offsetof(struct pt_regs, ax);

			break;

		case 0x51:

			reg_offset = offsetof(struct pt_regs, cx);

			break;

		case 0x52:

			reg_offset = offsetof(struct pt_regs, dx);

			break;

		case 0x53:

			reg_offset = offsetof(struct pt_regs, bx);

			break;

		case 0x54:

			reg_offset = offsetof(struct pt_regs, sp);

			break;

		case 0x55:

			reg_offset = offsetof(struct pt_regs, bp);

			break;

		case 0x56:

			reg_offset = offsetof(struct pt_regs, si);

			break;

		case 0x57:

			reg_offset = offsetof(struct pt_regs, di);

			break;

		}

	}



	auprobe->push.reg_offset = reg_offset;

	auprobe->push.ilen = insn->length;

	auprobe->ops = &push_xol_ops;

	return 0;

}



/**

 * arch_uprobe_analyze_insn - instruction analysis including validity and fixups.

 * @mm: the probed address space.
@@ -771,6 +866,10 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm, 
	if (ret != -ENOSYS)

		return ret;



	ret = push_setup_xol_ops(auprobe, &insn);

	if (ret != -ENOSYS)

		return ret;



	/*

	 * Figure out which fixups default_post_xol_op() will need to perform,

	 * and annotate defparam->fixups accordingly.