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Commit d87d15de authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "iommu: arm-smmu: Add support for new attributes"

parents 165c0bb2 40a76914

drivers/iommu/arm-smmu.c

+22 −20
Original line number Original line Diff line number Diff line
@@ -2041,13 +2041,14 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, 
	} else

	} else

		reg |= SCTLR_SHCFG_NSH << SCTLR_SHCFG_SHIFT;

		reg |= SCTLR_SHCFG_NSH << SCTLR_SHCFG_SHIFT;





	if (attributes & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)) {

	if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_CFRE))

		reg &= ~SCTLR_CFRE;



	if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_NO_STALL))

		reg &= ~SCTLR_CFCFG;

		reg &= ~SCTLR_CFCFG;

		reg |= SCTLR_HUPCF;

	}





	if (attributes & (1 << DOMAIN_ATTR_NO_CFRE))

	if (attributes & (1 << DOMAIN_ATTR_FAULT_MODEL_HUPCF))

		reg &= ~SCTLR_CFRE;

		reg |= SCTLR_HUPCF;





	if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) &&

	if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) &&

	     !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1)

	     !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1)
@@ -3016,16 +3017,20 @@ static int arm_smmu_setup_default_domain(struct device *dev, 
	if (of_property_match_string(np, "qcom,iommu-faults",

	if (of_property_match_string(np, "qcom,iommu-faults",

				     "stall-disable") >= 0)

				     "stall-disable") >= 0)

		__arm_smmu_domain_set_attr(domain,

		__arm_smmu_domain_set_attr(domain,

			DOMAIN_ATTR_CB_STALL_DISABLE, &attr);

			DOMAIN_ATTR_FAULT_MODEL_NO_STALL, &attr);



	if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0)

		__arm_smmu_domain_set_attr(

			domain, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, &attr);



	if (of_property_match_string(np, "qcom,iommu-faults", "HUPCF") >= 0)

		__arm_smmu_domain_set_attr(

			domain, DOMAIN_ATTR_FAULT_MODEL_HUPCF, &attr);





	if (of_property_match_string(np, "qcom,iommu-faults", "non-fatal") >= 0)

	if (of_property_match_string(np, "qcom,iommu-faults", "non-fatal") >= 0)

		__arm_smmu_domain_set_attr(domain,

		__arm_smmu_domain_set_attr(domain,

			DOMAIN_ATTR_NON_FATAL_FAULTS, &attr);

			DOMAIN_ATTR_NON_FATAL_FAULTS, &attr);





	if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0)

		__arm_smmu_domain_set_attr(

			domain, DOMAIN_ATTR_NO_CFRE, &attr);



	/* Default value: disabled */

	/* Default value: disabled */

	ret = of_property_read_u32(np, "qcom,iommu-vmid", &val);

	ret = of_property_read_u32(np, "qcom,iommu-vmid", &val);

	if (!ret) {

	if (!ret) {
@@ -3849,14 +3854,10 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, 
			& (1 << DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT));

			& (1 << DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT));

		ret = 0;

		ret = 0;

		break;

		break;

	case DOMAIN_ATTR_CB_STALL_DISABLE:

	case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE:

		*((int *)data) = !!(smmu_domain->attributes

	case DOMAIN_ATTR_FAULT_MODEL_NO_STALL:

			& (1 << DOMAIN_ATTR_CB_STALL_DISABLE));

	case DOMAIN_ATTR_FAULT_MODEL_HUPCF:

		ret = 0;

		*((int *)data) = !!(smmu_domain->attributes & (1U << attr));

		break;

	case DOMAIN_ATTR_NO_CFRE:

		*((int *)data) = !!(smmu_domain->attributes

			& (1 << DOMAIN_ATTR_NO_CFRE));

		ret = 0;

		ret = 0;

		break;

		break;

	default:

	default:
@@ -4053,8 +4054,9 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, 
		break;

		break;

	}

	}

	case DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR:

	case DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR:

	case DOMAIN_ATTR_CB_STALL_DISABLE:

	case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE:

	case DOMAIN_ATTR_NO_CFRE:

	case DOMAIN_ATTR_FAULT_MODEL_NO_STALL:

	case DOMAIN_ATTR_FAULT_MODEL_HUPCF:

		if (*((int *)data))

		if (*((int *)data))

			smmu_domain->attributes |=

			smmu_domain->attributes |=

				1 << attr;

				1 << attr;

drivers/iommu/iommu-debug.c

+6 −2
Original line number Original line Diff line number Diff line
@@ -78,8 +78,12 @@ static const char *iommu_debug_attr_to_string(enum iommu_attr attr) 
		return "DOMAIN_ATTR_FAST";

		return "DOMAIN_ATTR_FAST";

	case DOMAIN_ATTR_EARLY_MAP:

	case DOMAIN_ATTR_EARLY_MAP:

		return "DOMAIN_ATTR_EARLY_MAP";

		return "DOMAIN_ATTR_EARLY_MAP";

	case DOMAIN_ATTR_CB_STALL_DISABLE:

	case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE:

		return "DOMAIN_ATTR_CB_STALL_DISABLE";

		return "DOMAIN_ATTR_FAULT_MODEL_NO_CFRE";

	case DOMAIN_ATTR_FAULT_MODEL_NO_STALL:

		return "DOMAIN_ATTR_FAULT_MODEL_NO_STALL";

	case DOMAIN_ATTR_FAULT_MODEL_HUPCF:

		return "DOMAIN_ATTR_FAULT_MODEL_HUPCF";

	default:

	default:

		return "Unknown attr!";

		return "Unknown attr!";

	}

	}

include/linux/iommu.h

+3 −2
Original line number Original line Diff line number Diff line
@@ -171,10 +171,11 @@ enum iommu_attr { 
	DOMAIN_ATTR_EARLY_MAP,

	DOMAIN_ATTR_EARLY_MAP,

	DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT,

	DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT,

	DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,

	DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,

	DOMAIN_ATTR_CB_STALL_DISABLE,

	DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR,

	DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR,

	DOMAIN_ATTR_USE_LLC_NWA,

	DOMAIN_ATTR_USE_LLC_NWA,

	DOMAIN_ATTR_NO_CFRE,

	DOMAIN_ATTR_FAULT_MODEL_NO_CFRE,

	DOMAIN_ATTR_FAULT_MODEL_NO_STALL,

	DOMAIN_ATTR_FAULT_MODEL_HUPCF,

	DOMAIN_ATTR_MAX,

	DOMAIN_ATTR_MAX,

};

};