Commit d7c97abf authored May 16, 2019 by David Collins

clk: qcom: gpucc-kona: configure gpu_cc_ahb_clk to be always-on



Add the CLK_IS_CRITICAL flag for gpu_cc_ahb_clk to keep it
enabled at all times.  This is needed to avoid unclocked
register accesses by SMMU since SMMU vote registers do not
enable gpu_cc_ahb_clk.

Also skip an enable check for this clock since it will not
be physically enabled until gpu_cx_gdsc is enabled.

Change-Id: I36ee76b56e7035c515936bdad67c22970b0bc401
Signed-off-by: David Collins <collinsd@codeaurora.org>

parent 580b80dd

drivers/clk/qcom/gpucc-kona.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -129,12 +129,13 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = {

		static struct clk_branch gpu_cc_ahb_clk = {
		.halt_reg = 0x1078,
		.halt_check = BRANCH_HALT,
		.halt_check = BRANCH_HALT_DELAY,
		.clkr = {
		.enable_reg = 0x1078,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
		.name = "gpu_cc_ahb_clk",
		.flags = CLK_IS_CRITICAL,
		.ops = &clk_branch2_ops,
		},
		},