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Commit d6a90bb8 authored by Philippe Bergheaud's avatar Philippe Bergheaud Committed by Michael Ellerman
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powerpc/powernv: Enable tunneled operations 



P9 supports PCI tunneled operations (atomics and as_notify). This
patch adds support for tunneled operations on powernv, with a new
API, to be called by device drivers:

pnv_pci_enable_tunnel()
   Enable tunnel operations, tell driver the 16-bit ASN indication
   used by kernel.

pnv_pci_disable_tunnel()
   Disable tunnel operations.

pnv_pci_set_tunnel_bar()
   Tell kernel the Tunnel BAR Response address used by driver.
   This function uses two new OPAL calls, as the PBCQ Tunnel BAR
   register is configured by skiboot.

pnv_pci_get_as_notify_info()
   Return the ASN info of the thread to be woken up.

Signed-off-by: default avatarPhilippe Bergheaud <felix@linux.vnet.ibm.com>
Reviewed-by: default avatarFrederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: default avatarChristophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 2b74e2a9

arch/powerpc/include/asm/opal-api.h

+3 −1
Original line number Diff line number Diff line
@@ -204,7 +204,9 @@ 
#define OPAL_NPU_SPA_SETUP			159

#define OPAL_NPU_SPA_CLEAR_CACHE		160

#define OPAL_NPU_TL_SET				161

#define OPAL_LAST				161

#define OPAL_PCI_GET_PBCQ_TUNNEL_BAR		164

#define OPAL_PCI_SET_PBCQ_TUNNEL_BAR		165

#define OPAL_LAST				165



/* Device tree flags */

arch/powerpc/include/asm/opal.h

+2 −0
Original line number Diff line number Diff line
@@ -204,6 +204,8 @@ int64_t opal_unregister_dump_region(uint32_t id); 
int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);

int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);

int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);

int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr);

int64_t opal_pci_set_pbcq_tunnel_bar(uint64_t phb_id, uint64_t addr);

int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,

		uint64_t msg_len);

int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,

arch/powerpc/include/asm/pnv-pci.h

+6 −0
Original line number Diff line number Diff line
@@ -29,6 +29,12 @@ extern int pnv_pci_set_power_state(uint64_t id, uint8_t state, 
extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,

			   u64 desc);



extern int pnv_pci_enable_tunnel(struct pci_dev *dev, uint64_t *asnind);

extern int pnv_pci_disable_tunnel(struct pci_dev *dev);

extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,

				  int enable);

extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid,

				      u32 *pid, u32 *tid);

int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);

int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,

			   unsigned int virq);

arch/powerpc/platforms/powernv/opal-wrappers.S

+2 −0
Original line number Diff line number Diff line
@@ -323,3 +323,5 @@ OPAL_CALL(opal_sensor_group_clear, OPAL_SENSOR_GROUP_CLEAR); 
OPAL_CALL(opal_npu_spa_setup,			OPAL_NPU_SPA_SETUP);

OPAL_CALL(opal_npu_spa_clear_cache,		OPAL_NPU_SPA_CLEAR_CACHE);

OPAL_CALL(opal_npu_tl_set,			OPAL_NPU_TL_SET);

OPAL_CALL(opal_pci_get_pbcq_tunnel_bar,		OPAL_PCI_GET_PBCQ_TUNNEL_BAR);

OPAL_CALL(opal_pci_set_pbcq_tunnel_bar,		OPAL_PCI_SET_PBCQ_TUNNEL_BAR);

arch/powerpc/platforms/powernv/pci-cxl.c

+0 −8
Original line number Diff line number Diff line
@@ -16,14 +16,6 @@ 


#include "pci.h"



struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)

{

	struct pci_controller *hose = pci_bus_to_host(dev->bus);



	return of_node_get(hose->dn);

}

EXPORT_SYMBOL(pnv_pci_get_phb_node);



int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)

{

	struct pci_controller *hose = pci_bus_to_host(dev->bus);