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Commit d66047e4 authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915/cnl: Add WaRsDisableCoarsePowerGating 



Old Wa added now forever on CNL all steppings.

With CPU P states enabled along with RC6, dispatcher
hangs can happen.

Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180222200535.9290-1-rodrigo.vivi@intel.com
parent c4932d79

drivers/gpu/drm/i915/i915_drv.h

+3 −2
Original line number Diff line number Diff line
@@ -2788,9 +2788,10 @@ intel_info(const struct drm_i915_private *dev_priv) 
/* Early gen2 have a totally busted CS tlb and require pinned batches. */

#define HAS_BROKEN_CS_TLB(dev_priv)	(IS_I830(dev_priv) || IS_I845G(dev_priv))



/* WaRsDisableCoarsePowerGating:skl,bxt */

/* WaRsDisableCoarsePowerGating:skl,cnl */

#define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \

	(IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))

	(IS_CANNONLAKE(dev_priv) || \

	 IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))



/*

 * dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts

drivers/gpu/drm/i915/intel_guc.c

+1 −1
Original line number Diff line number Diff line
@@ -370,7 +370,7 @@ int intel_guc_sample_forcewake(struct intel_guc *guc) 
	u32 action[2];



	action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;

	/* WaRsDisableCoarsePowerGating:skl,bxt */

	/* WaRsDisableCoarsePowerGating:skl,cnl */

	if (!HAS_RC6(dev_priv) || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))

		action[1] = 0;

	else

drivers/gpu/drm/i915/intel_pm.c

+1 −1
Original line number Diff line number Diff line
@@ -6715,7 +6715,7 @@ static void gen9_enable_rc6(struct drm_i915_private *dev_priv) 


	/*

	 * 3b: Enable Coarse Power Gating only when RC6 is enabled.

	 * WaRsDisableCoarsePowerGating:skl,bxt - Render/Media PG need to be disabled with RC6.

	 * WaRsDisableCoarsePowerGating:skl,cnl - Render/Media PG need to be disabled with RC6.

	 */

	if (NEEDS_WaRsDisableCoarsePowerGating(dev_priv))

		I915_WRITE(GEN9_PG_ENABLE, 0);