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Commit d652074e authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
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[ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset



If the hard reset routine is using the watchdog, then
ensure that the clock for the watchdog has been enabled
before we try and issue a reset.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent cf08167c
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+11 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@
#include <asm/plat-s3c/regs-watchdog.h>
#include <asm/arch/regs-clock.h>

#include <linux/clk.h>
#include <linux/err.h>

void (*s3c24xx_idle)(void);
void (*s3c24xx_reset_hook)(void);

@@ -59,6 +62,8 @@ static void arch_idle(void)
static void
arch_reset(char mode)
{
	struct clk *wdtclk;

	if (mode == 's') {
		cpu_reset(0);
	}
@@ -70,6 +75,12 @@ arch_reset(char mode)

	__raw_writel(0, S3C2410_WTCON);	  /* disable watchdog, to be safe  */

	wdtclk = clk_get(NULL, "watchdog");
	if (!IS_ERR(wdtclk)) {
		clk_enable(wdtclk);
	} else
		printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);

	/* put initial values into count and data */
	__raw_writel(0x100, S3C2410_WTCNT);
	__raw_writel(0x100, S3C2410_WTDAT);