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Commit d64eab76 authored by Vikas Chaudhary's avatar Vikas Chaudhary Committed by James Bottomley
Browse files

[SCSI] qla4xxx: remove unwanted check for bad spd 



Signed-off-by: default avatarVikas Chaudhary <vikas.chaudhary@qlogic.com>
Signed-off-by: default avatarSaurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: default avatarRavi Anand <ravi.anand@qlogic.com>
Reviewed-by: default avatarMike Christie <michaelc@cs.wisc.edu>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@suse.de>
parent 7b3595df

drivers/scsi/qla4xxx/ql4_nx.c

+0 −17
Original line number Diff line number Diff line
@@ -1081,21 +1081,6 @@ qla4_8xxx_pinit_from_rom(struct scsi_qla_host *ha, int verbose) 
	return 0;

}



static int qla4_8xxx_check_for_bad_spd(struct scsi_qla_host *ha)

{

	u32 val = 0;

	val = qla4_8xxx_rd_32(ha, BOOT_LOADER_DIMM_STATUS) ;

	val &= QLA82XX_BOOT_LOADER_MN_ISSUE;

	if (val & QLA82XX_PEG_TUNE_MN_SPD_ZEROED) {

		printk("Memory DIMM SPD not programmed.  Assumed valid.\n");

		return 1;

	} else if (val) {

		printk("Memory DIMM type incorrect.  Info:%08X.\n", val);

		return 2;

	}

	return 0;

}



static int

qla4_8xxx_load_from_flash(struct scsi_qla_host *ha, uint32_t image_start)

{
@@ -1380,8 +1365,6 @@ static int qla4_8xxx_cmdpeg_ready(struct scsi_qla_host *ha, int pegtune_val) 


		} while (--retries);



		qla4_8xxx_check_for_bad_spd(ha);



		if (!retries) {

			pegtune_val = qla4_8xxx_rd_32(ha,

				QLA82XX_ROMUSB_GLB_PEGTUNE_DONE);

drivers/scsi/qla4xxx/ql4_nx.h

+0 −3
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ 


#define CRB_CMDPEG_STATE		QLA82XX_REG(0x50)

#define CRB_RCVPEG_STATE		QLA82XX_REG(0x13c)

#define BOOT_LOADER_DIMM_STATUS		QLA82XX_REG(0x54)

#define CRB_DMA_SHIFT			QLA82XX_REG(0xcc)



#define QLA82XX_HW_H0_CH_HUB_ADR	0x05
@@ -529,8 +528,6 @@ 
# define QLA82XX_CAM_RAM_BASE	(QLA82XX_CRB_CAM + 0x02000)

# define QLA82XX_CAM_RAM(reg)	(QLA82XX_CAM_RAM_BASE + (reg))



#define QLA82XX_PEG_TUNE_MN_SPD_ZEROED	0x80000000

#define QLA82XX_BOOT_LOADER_MN_ISSUE	0xff00ffff

#define QLA82XX_PORT_MODE_ADDR		(QLA82XX_CAM_RAM(0x24))

#define QLA82XX_PEG_HALT_STATUS1	(QLA82XX_CAM_RAM(0xa8))

#define QLA82XX_PEG_HALT_STATUS2	(QLA82XX_CAM_RAM(0xac))