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Commit d5e2d008 authored by Linus Torvalds's avatar Linus Torvalds
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Pull powerpc updates from Michael Ellerman:
 "This was delayed a day or two by some build-breakage on old toolchains
  which we've now fixed.

  There's two PCI commits both acked by Bjorn.

  There's one commit to mm/hugepage.c which is (co)authored by Kirill.

  Highlights:
   - Restructure Linux PTE on Book3S/64 to Radix format from Paul
     Mackerras
   - Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh
     Kumar K.V
   - Add POWER9 cputable entry from Michael Neuling
   - FPU/Altivec/VSX save/restore optimisations from Cyril Bur
   - Add support for new ftrace ABI on ppc64le from Torsten Duwe

  Various cleanups & minor fixes from:
   - Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy,
     Cyril Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell
     Currey, Sukadev Bhattiprolu, Suraj Jitindar Singh.

  General:
   - atomics: Allow architectures to define their own __atomic_op_*
     helpers from Boqun Feng
   - Implement atomic{, 64}_*_return_* variants and acquire/release/
     relaxed variants for (cmp)xchg from Boqun Feng
   - Add powernv_defconfig from Jeremy Kerr
   - Fix BUG_ON() reporting in real mode from Balbir Singh
   - Add xmon command to dump OPAL msglog from Andrew Donnellan
   - Add xmon command to dump process/task similar to ps(1) from Douglas
     Miller
   - Clean up memory hotplug failure paths from David Gibson

  pci/eeh:
   - Redesign SR-IOV on PowerNV to give absolute isolation between VFs
     from Wei Yang.
   - EEH Support for SRIOV VFs from Wei Yang and Gavin Shan.
   - PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang
   - PCI: Add pcibios_bus_add_device() weak function from Wei Yang
   - MAINTAINERS: Update EEH details and maintainership from Russell
     Currey

  cxl:
   - Support added to the CXL driver for running on both bare-metal and
     hypervisor systems, from Christophe Lombard and Frederic Barrat.
   - Ignore probes for virtual afu pci devices from Vaibhav Jain

  perf:
   - Export Power8 generic and cache events to sysfs from Sukadev
     Bhattiprolu
   - hv-24x7: Fix usage with chip events, display change in counter
     values, display domain indices in sysfs, eliminate domain suffix in
     event names, from Sukadev Bhattiprolu

  Freescale:
   - Updates from Scott: "Highlights include 8xx optimizations, 32-bit
     checksum optimizations, 86xx consolidation, e5500/e6500 cpu
     hotplug, more fman and other dt bits, and minor fixes/cleanup"

* tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (179 commits)
  powerpc: Fix unrecoverable SLB miss during restore_math()
  powerpc/8xx: Fix do_mtspr_cpu6() build on older compilers
  powerpc/rcpm: Fix build break when SMP=n
  powerpc/book3e-64: Use hardcoded mttmr opcode
  powerpc/fsl/dts: Add "jedec,spi-nor" flash compatible
  powerpc/T104xRDB: add tdm riser card node to device tree
  powerpc32: PAGE_EXEC required for inittext
  powerpc/mpc85xx: Add pcsphy nodes to FManV3 device tree
  powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s)
  powerpc/86xx: Introduce and use common dtsi
  powerpc/86xx: Update device tree
  powerpc/86xx: Move dts files to fsl directory
  powerpc/86xx: Switch to kconfig fragments approach
  powerpc/86xx: Update defconfigs
  powerpc/86xx: Consolidate common platform code
  powerpc32: Remove one insn in mulhdu
  powerpc32: small optimisation in flush_icache_range()
  powerpc: Simplify test in __dma_sync()
  powerpc32: move xxxxx_dcache_range() functions inline
  powerpc32: Remove clear_pages() and define clear_page() inline
  ...
parents 31e18236 6e669f08
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+5 −5
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ Description: read only
                Decimal value of the Per Process MMIO space length.
Users:		https://github.com/ibm-capi/libcxl

What:           /sys/class/cxl/<afu>m/pp_mmio_off
What:           /sys/class/cxl/<afu>m/pp_mmio_off (not in a guest)
Date:           September 2014
Contact:        linuxppc-dev@lists.ozlabs.org
Description:    read only
@@ -183,7 +183,7 @@ Description: read only
                Identifies the revision level of the PSL.
Users:		https://github.com/ibm-capi/libcxl

What:           /sys/class/cxl/<card>/base_image
What:           /sys/class/cxl/<card>/base_image (not in a guest)
Date:           September 2014
Contact:        linuxppc-dev@lists.ozlabs.org
Description:    read only
@@ -193,7 +193,7 @@ Description: read only
                during the initial program load.
Users:		https://github.com/ibm-capi/libcxl

What:           /sys/class/cxl/<card>/image_loaded
What:           /sys/class/cxl/<card>/image_loaded (not in a guest)
Date:           September 2014
Contact:        linuxppc-dev@lists.ozlabs.org
Description:    read only
@@ -201,7 +201,7 @@ Description: read only
                onto the card.
Users:		https://github.com/ibm-capi/libcxl

What:           /sys/class/cxl/<card>/load_image_on_perst
What:           /sys/class/cxl/<card>/load_image_on_perst (not in a guest)
Date:           December 2014
Contact:        linuxppc-dev@lists.ozlabs.org
Description:    read/write
@@ -224,7 +224,7 @@ Description: write only
                to reload the FPGA depending on load_image_on_perst.
Users:		https://github.com/ibm-capi/libcxl

What:		/sys/class/cxl/<card>/perst_reloads_same_image
What:		/sys/class/cxl/<card>/perst_reloads_same_image (not in a guest)
Date:		July 2015
Contact:	linuxppc-dev@lists.ozlabs.org
Description:	read/write
+40 −0
Original line number Diff line number Diff line
@@ -315,6 +315,16 @@ PROPERTIES
		Value type: <phandle>
		Definition: A phandle for 1EEE1588 timer.

- pcsphy-handle
		Usage required for "fsl,fman-memac" MACs
		Value type: <phandle>
		Definition: A phandle for pcsphy.

- tbi-handle
		Usage required for "fsl,fman-dtsec" MACs
		Value type: <phandle>
		Definition: A phandle for tbiphy.

EXAMPLE

fman1_tx28: port@a8000 {
@@ -340,6 +350,7 @@ ethernet@e0000 {
	reg = <0xe0000 0x1000>;
	fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
	ptp-timer = <&ptp-timer>;
	tbi-handle = <&tbi0>;
};

============================================================================
@@ -415,6 +426,13 @@ PROPERTIES
		The settings and programming routines for internal/external
		MDIO are different. Must be included for internal MDIO.

For internal PHY device on internal mdio bus, a PHY node should be created.
See the definition of the PHY node in booting-without-of.txt for an
example of how to define a PHY (Internal PHY has no interrupt line).
- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,
  PCS PHY addr must be '0'.

EXAMPLE

Example for FMan v2 external MDIO:
@@ -425,12 +443,29 @@ mdio@f1000 {
	interrupts = <101 2 0 0>;
};

Example for FMan v2 internal MDIO:

mdio@e3120 {
	compatible = "fsl,fman-mdio";
	reg = <0xe3120 0xee0>;
	fsl,fman-internal-mdio;

	tbi1: tbi-phy@8 {
		reg = <0x8>;
		device_type = "tbi-phy";
	};
};

Example for FMan v3 internal MDIO:

mdio@f1000 {
	compatible = "fsl,fman-memac-mdio";
	reg = <0xf1000 0x1000>;
	fsl,fman-internal-mdio;

	pcsphy6: ethernet-phy@0 {
		reg = <0x0>;
	};
};

=============================================================================
@@ -568,6 +603,7 @@ fman@400000 {
		cell-index = <0>;
		reg = <0xe0000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0x8 &fman1_tx_0x28>;
		tbi-handle = <&tbi5>;
	};

	ethernet@e2000 {
@@ -575,6 +611,7 @@ fman@400000 {
		cell-index = <1>;
		reg = <0xe2000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0x9 &fman1_tx_0x29>;
		tbi-handle = <&tbi6>;
	};

	ethernet@e4000 {
@@ -582,6 +619,7 @@ fman@400000 {
		cell-index = <2>;
		reg = <0xe4000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xa &fman1_tx_0x2a>;
		tbi-handle = <&tbi7>;
	};

	ethernet@e6000 {
@@ -589,6 +627,7 @@ fman@400000 {
		cell-index = <3>;
		reg = <0xe6000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xb &fman1_tx_0x2b>;
		tbi-handle = <&tbi8>;
	};

	ethernet@e8000 {
@@ -596,6 +635,7 @@ fman@400000 {
		cell-index = <4>;
		reg = <0xf0000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xc &fman1_tx_0x2c>;
		tbi-handle = <&tbi9>;

	ethernet@f0000 {
		cell-index = <8>;
+63 −0
Original line number Diff line number Diff line
* Run Control and Power Management
-------------------------------------------
The RCPM performs all device-level tasks associated with device run control
and power management.

Required properites:
  - reg : Offset and length of the register set of the RCPM block.
  - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
	fsl,rcpm-wakeup property.
  - compatible : Must contain a chip-specific RCPM block compatible string
	and (if applicable) may contain a chassis-version RCPM compatible
	string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
	such as:
	* "fsl,p2041-rcpm"
	* "fsl,p5020-rcpm"
	* "fsl,t4240-rcpm"

	Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
	such as:
	* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
	* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
	* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm

All references to "1.0" and "2.0" refer to the QorIQ chassis version to
which the chip complies.
Chassis Version		Example Chips
---------------		-------------------------------
1.0				p4080, p5020, p5040, p2041, p3041
2.0				t4240, b4860, b4420
2.1				t1040, ls1021

Example:
The RCPM node for T4240:
	rcpm: global-utilities@e2000 {
		compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
		reg = <0xe2000 0x1000>;
		fsl,#rcpm-wakeup-cells = <2>;
	};

* Freescale RCPM Wakeup Source Device Tree Bindings
-------------------------------------------
Required fsl,rcpm-wakeup property should be added to a device node if the device
can be used as a wakeup source.

  - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
	register cells. The number of IPPDEXPCR register cells is defined in
	"fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is
	the bit mask that should be set in IPPDEXPCR0, and the second register
	cell is for IPPDEXPCR1, and so on.

	Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a
	mechanism for keeping certain blocks awake during STANDBY and MEM, in
	order to use them as wake-up sources.

Example:
	lpuart0: serial@2950000 {
		compatible = "fsl,ls1021a-lpuart";
		reg = <0x0 0x2950000 0x0 0x1000>;
		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&sysclk>;
		clock-names = "ipg";
		fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>;
	};
+1 −1
Original line number Diff line number Diff line
@@ -2620,7 +2620,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
	nolapic_timer	[X86-32,APIC] Do not use the local APIC timer.

	noltlbs		[PPC] Do not use large page/tlb entries for kernel
			lowmem mapping on PPC40x.
			lowmem mapping on PPC40x and PPC8xx

	nomca		[IA-64] Disable machine check abort handling

+55 −0
Original line number Diff line number Diff line
@@ -116,6 +116,8 @@ Work Element Descriptor (WED)
User API
========

1. AFU character devices

    For AFUs operating in AFU directed mode, two character device
    files will be created. /dev/cxl/afu0.0m will correspond to a
    master context and /dev/cxl/afu0.0s will correspond to a slave
@@ -362,6 +364,59 @@ read
        reserved fields:
            For future extensions and padding


2. Card character device (powerVM guest only)

    In a powerVM guest, an extra character device is created for the
    card. The device is only used to write (flash) a new image on the
    FPGA accelerator. Once the image is written and verified, the
    device tree is updated and the card is reset to reload the updated
    image.

open
----

    Opens the device and allocates a file descriptor to be used with
    the rest of the API. The device can only be opened once.

ioctl
-----

CXL_IOCTL_DOWNLOAD_IMAGE:
CXL_IOCTL_VALIDATE_IMAGE:
    Starts and controls flashing a new FPGA image. Partial
    reconfiguration is not supported (yet), so the image must contain
    a copy of the PSL and AFU(s). Since an image can be quite large,
    the caller may have to iterate, splitting the image in smaller
    chunks.

    Takes a pointer to a struct cxl_adapter_image:
        struct cxl_adapter_image {
            __u64 flags;
            __u64 data;
            __u64 len_data;
            __u64 len_image;
            __u64 reserved1;
            __u64 reserved2;
            __u64 reserved3;
            __u64 reserved4;
        };

    flags:
        These flags indicate which optional fields are present in
        this struct. Currently all fields are mandatory.

    data:
        Pointer to a buffer with part of the image to write to the
        card.

    len_data:
        Size of the buffer pointed to by data.

    len_image:
        Full size of the image.


Sysfs Class
===========

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