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Commit d570b7ee authored by Nogah Frankel's avatar Nogah Frankel Committed by David S. Miller
Browse files

mlxsw: Change trap set function 



Change trap setting function so instead of determining the trap group by
trap id, it gets it as a parameter (so later we can have different trap
groups for Spectrum and Switchx2).
Add "is_ctrl" parameter to the trap setting function. It control whether
the trapped packets wait in a designated control buffer or in their
default one. This parameter is ignored by Switchx2 and Switchib.
Add these parameters to the traps array in Spectrum, Switchx2 and
Switchib.

Signed-off-by: default avatarNogah Frankel <nogahf@mellanox.com>
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 85d5c9cd

drivers/net/ethernet/mellanox/mlxsw/core.c

+9 −5
Original line number Diff line number Diff line
@@ -590,7 +590,8 @@ static int mlxsw_emad_traps_set(struct mlxsw_core *mlxsw_core) 
		return err;



	mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,

			    MLXSW_TRAP_ID_ETHEMAD);

			    MLXSW_TRAP_ID_ETHEMAD,

			    MLXSW_REG_HTGT_TRAP_GROUP_EMAD, false);

	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);

}
@@ -643,7 +644,8 @@ static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 


	mlxsw_core->emad.use_emad = false;

	mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,

			    MLXSW_TRAP_ID_ETHEMAD);

			    MLXSW_TRAP_ID_ETHEMAD,

			    MLXSW_REG_HTGT_TRAP_GROUP_EMAD, false);

	mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);



	mlxsw_core_rx_listener_unregister(mlxsw_core,
@@ -1430,7 +1432,8 @@ int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 
	if (err)

		return err;



	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id);

	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,

			    listener->trap_group, listener->is_ctrl);

	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);

	if (err)

		goto err_trap_set;
@@ -1451,7 +1454,8 @@ void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 


	if (!listener->is_event) {

		mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,

				    listener->trap_id);

				    listener->trap_id, listener->trap_group,

				    listener->is_ctrl);

		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);

	}

drivers/net/ethernet/mellanox/mlxsw/core.h

+7 −1
Original line number Diff line number Diff line
@@ -98,10 +98,12 @@ struct mlxsw_listener { 
	} u;

	enum mlxsw_reg_hpkt_action action;

	enum mlxsw_reg_hpkt_action unreg_action;

	u8 trap_group;

	bool is_ctrl; /* should go via control buffer or not */

	bool is_event;

};



#define MLXSW_RXL(_func, _trap_id, _action, _unreg_action)		\

#define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _unreg_action)	\

	{								\

		.trap_id = MLXSW_TRAP_ID_##_trap_id,			\

		.u.rx_listener =					\
@@ -112,6 +114,8 @@ struct mlxsw_listener { 
		},							\

		.action = MLXSW_REG_HPKT_ACTION_##_action,		\

		.unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action,	\

		.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_RX,		\

		.is_ctrl = _is_ctrl,					\

		.is_event = false,					\

	}
@@ -124,6 +128,8 @@ struct mlxsw_listener { 
			.trap_id = MLXSW_TRAP_ID_##_trap_id,	\

		},						\

		.action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,	\

		.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_EMAD,	\

		.is_ctrl = false,				\

		.is_event = true,				\

	}

drivers/net/ethernet/mellanox/mlxsw/reg.h

+7 −13
Original line number Diff line number Diff line
@@ -3214,6 +3214,7 @@ enum { 


/* reg_hpkt_ctrl

 * Configure dedicated buffer resources for control packets.

 * Ignored by SwitchX-2.

 * 0 - Keep factory defaults.

 * 1 - Do not use control buffer for this trap ID.

 * 2 - Use control buffer for this trap ID.
@@ -3221,25 +3222,18 @@ enum { 
 */

MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);



static inline void mlxsw_reg_hpkt_pack(char *payload, u8 action, u16 trap_id)

static inline void mlxsw_reg_hpkt_pack(char *payload, u8 action, u16 trap_id,

				       enum mlxsw_reg_htgt_trap_group trap_group,

				       bool is_ctrl)

{

	enum mlxsw_reg_htgt_trap_group trap_group;



	MLXSW_REG_ZERO(hpkt, payload);

	mlxsw_reg_hpkt_ack_set(payload, MLXSW_REG_HPKT_ACK_NOT_REQUIRED);

	mlxsw_reg_hpkt_action_set(payload, action);

	switch (trap_id) {

	case MLXSW_TRAP_ID_ETHEMAD:

	case MLXSW_TRAP_ID_PUDE:

		trap_group = MLXSW_REG_HTGT_TRAP_GROUP_EMAD;

		break;

	default:

		trap_group = MLXSW_REG_HTGT_TRAP_GROUP_RX;

		break;

	}

	mlxsw_reg_hpkt_trap_group_set(payload, trap_group);

	mlxsw_reg_hpkt_trap_id_set(payload, trap_id);

	mlxsw_reg_hpkt_ctrl_set(payload, MLXSW_REG_HPKT_CTRL_PACKET_DEFAULT);

	mlxsw_reg_hpkt_ctrl_set(payload, is_ctrl ?

				MLXSW_REG_HPKT_CTRL_PACKET_USE_BUFFER :

				MLXSW_REG_HPKT_CTRL_PACKET_NO_BUFFER);

}



/* RGCR - Router General Configuration Register

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+23 −23
Original line number Diff line number Diff line
@@ -2730,37 +2730,37 @@ static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port, 
	return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);

}



#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action)				\

#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _is_ctrl)		\

	MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \

		  DISCARD)

		  _is_ctrl, DISCARD)



#define MLXSW_SP_RXL_MARK(_trap_id, _action)				\

#define MLXSW_SP_RXL_MARK(_trap_id, _action, _is_ctrl)			\

	MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action,	\

		  DISCARD)

		  _is_ctrl, DISCARD)



static const struct mlxsw_listener mlxsw_sp_listener[] = {

	/* Events */

	MLXSW_EVENTL(mlxsw_sp_pude_event_func, PUDE),

	/* L2 traps */

	MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU),

	MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU),

	MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU),

	MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU),

	MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, true),

	MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, true),

	MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, true),

	MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, false),

	MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, false),

	MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, false),

	/* L3 traps */

	MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU),

	MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU),

	MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, false),

	MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, false),

};



static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)

drivers/net/ethernet/mellanox/mlxsw/switchx2.c

+3 −2
Original line number Diff line number Diff line
@@ -1449,7 +1449,8 @@ static int mlxsw_sx_port_type_set(struct mlxsw_core *mlxsw_core, u8 local_port, 
}



#define MLXSW_SX_RXL(_trap_id)						\

	MLXSW_RXL(mlxsw_sx_rx_listener_func, _trap_id, TRAP_TO_CPU, FORWARD)

	MLXSW_RXL(mlxsw_sx_rx_listener_func, _trap_id, TRAP_TO_CPU,	\

		  false, FORWARD)



static const struct mlxsw_listener mlxsw_sx_listener[] = {

	MLXSW_EVENTL(mlxsw_sx_pude_event_func, PUDE),