Merge tag 'kvm-arm-for-3.13-1' of git://git.linaro.org/people/cdall/linux-kvm-arm into next

	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).

4.83 KVM_GET_REG_LIST

4.83 KVM_ARM_PREFERRED_TARGET

Capability: basic

Architectures: arm, arm64

Type: vm ioctl

Parameters: struct struct kvm_vcpu_init (out)

Returns: 0 on success; -1 on error

Errors:

  ENODEV:    no preferred target available for the host

This queries KVM for preferred CPU target type which can be emulated

by KVM on underlying host.

The ioctl returns struct kvm_vcpu_init instance containing information

about preferred CPU target type and recommended features for it.  The

kvm_vcpu_init->features bitmap returned will have feature bits set if

the preferred target recommends setting these features, but this is

not mandatory.

The information returned by this ioctl can be used to prepare an instance

of struct kvm_vcpu_init for KVM_ARM_VCPU_INIT ioctl which will result in

in VCPU matching underlying host.

4.84 KVM_GET_REG_LIST

Capability: basic

Architectures: arm, arm64

This ioctl returns the guest registers that are supported for the

KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.

4.84 KVM_ARM_SET_DEVICE_ADDR

4.85 KVM_ARM_SET_DEVICE_ADDR

Capability: KVM_CAP_ARM_SET_DEVICE_ADDR

Architectures: arm, arm64

KVM_RUN on any of the VCPUs.  Calling this ioctl twice for any of the

base addresses will return -EEXIST.

4.85 KVM_PPC_RTAS_DEFINE_TOKEN

4.86 KVM_PPC_RTAS_DEFINE_TOKEN

Capability: KVM_CAP_PPC_RTAS

Architectures: ppc

#define TTBCR_IRGN1	(3 << 24)

#define TTBCR_EPD1	(1 << 23)

#define TTBCR_A1	(1 << 22)

#define TTBCR_T1SZ	(3 << 16)

#define TTBCR_T1SZ	(7 << 16)

#define TTBCR_SH0	(3 << 12)

#define TTBCR_ORGN0	(3 << 10)

#define TTBCR_IRGN0	(3 << 8)

#define TTBCR_EPD0	(1 << 7)

#define TTBCR_T0SZ	3

#define TTBCR_T0SZ	(7 << 0)

#define HTCR_MASK	(TTBCR_T0SZ | TTBCR_IRGN0 | TTBCR_ORGN0 | TTBCR_SH0)

/* Hyp System Trap Register */

#define c6_IFAR		17	/* Instruction Fault Address Register */

#define c7_PAR		18	/* Physical Address Register */

#define c7_PAR_high	19	/* PAR top 32 bits */

#define c9_L2CTLR	20	/* Cortex A15 L2 Control Register */

#define c9_L2CTLR	20	/* Cortex A15/A7 L2 Control Register */

#define c10_PRRR	21	/* Primary Region Remap Register */

#define c10_NMRR	22	/* Normal Memory Remap Register */

#define c12_VBAR	23	/* Vector Base Address Register */

struct kvm_vcpu_init;

int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,

			const struct kvm_vcpu_init *init);

int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);

unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);

int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);

struct kvm_one_reg;

/* Supported Processor Types */

#define KVM_ARM_TARGET_CORTEX_A15	0

#define KVM_ARM_NUM_TARGETS		1

#define KVM_ARM_TARGET_CORTEX_A7	1

#define KVM_ARM_NUM_TARGETS		2

/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */

#define KVM_ARM_DEVICE_TYPE_SHIFT	0