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Commit d5518e4a authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "arm64: defconfig: enable display clock controller for kona"

parents 22367921 c51b4866

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

+23 −2
Original line number Original line Diff line number Diff line
@@ -3,13 +3,23 @@ Qualcomm Technologies, Inc. Display Clock Controller Binding 




Required properties :

Required properties :





- compatible : shall contain "qcom,sdm845-dispcc"

- compatible : Shall contain one of the following:

		"qcom,kona-dispcc",

		"qcom,sdm845-dispcc"

- reg : shall contain base register location and length.

- reg : shall contain base register location and length.

- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

of the clocks.

- clock-names: Shall contain "cfg_ahb_clk"

- clocks: phandle clock reference to the GCC AHB clock.

- #clock-cells : from common clock binding, shall contain 1.

- #clock-cells : from common clock binding, shall contain 1.

- #reset-cells : from common reset binding, shall contain 1.

- #reset-cells : from common reset binding, shall contain 1.

- #power-domain-cells : from generic power domain binding, shall contain 1.

- #power-domain-cells : from generic power domain binding, shall contain 1.





Example:

Optional properties :



- reg-names: Address name. Must be "cc_base".



Examples:

	dispcc: clock-controller@af00000 {

	dispcc: clock-controller@af00000 {

		compatible = "qcom,sdm845-dispcc";

		compatible = "qcom,sdm845-dispcc";

		reg = <0xaf00000 0x100000>;

		reg = <0xaf00000 0x100000>;
@@ -17,3 +27,14 @@ Example: 
		#reset-cells = <1>;

		#reset-cells = <1>;

		#power-domain-cells = <1>;

		#power-domain-cells = <1>;

	};

	};



	clock_dispcc: qcom,dispcc@af00000 {

		compatible = "qcom,kona-dispcc";

		reg = <0xaf00000 0x20000>;

		reg-names = "cc_base";

		vdd_mm-supply = <&VDD_MMCX_LEVEL>;

		clock-names = "cfg_ahb_clk";

		clocks = <&clock_gcc GCC_DISP_AHB_CLK>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

arch/arm64/configs/vendor/kona-perf_defconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -373,6 +373,7 @@ CONFIG_QPNP_REVID=y 
CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MSM_GCC_KONA=y

CONFIG_MSM_GCC_KONA=y

CONFIG_MSM_VIDEOCC_KONA=y

CONFIG_MSM_VIDEOCC_KONA=y

CONFIG_MSM_DISPCC_KONA=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

CONFIG_MAILBOX=y

arch/arm64/configs/vendor/kona_defconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -386,6 +386,7 @@ CONFIG_QPNP_REVID=y 
CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MSM_GCC_KONA=y

CONFIG_MSM_GCC_KONA=y

CONFIG_MSM_VIDEOCC_KONA=y

CONFIG_MSM_VIDEOCC_KONA=y

CONFIG_MSM_DISPCC_KONA=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

CONFIG_MAILBOX=y

drivers/clk/qcom/Kconfig

+10 −0
Original line number Original line Diff line number Diff line
@@ -302,3 +302,13 @@ config MSM_VIDEOCC_KONA 
	  KONA devices.

	  KONA devices.

	  Say Y if you want to support video devices and functionality such as

	  Say Y if you want to support video devices and functionality such as

	  video encode/decode.

	  video encode/decode.



config MSM_DISPCC_KONA

	tristate "KONA Display Clock Controller"

	select SDM_GCC_KONA

	depends on COMMON_CLK_QCOM

	help

	  Support for the display clock controller on Qualcomm Technologies, Inc

	  Kona devices.

	  Say Y if you want to support display devices and functionality such as

	  splash screen.

drivers/clk/qcom/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -26,6 +26,7 @@ obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o 
obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o

obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o

obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o

obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o

obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o

obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o

obj-$(CONFIG_MSM_DISPCC_KONA) += dispcc-kona.o

obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o

obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o

obj-$(CONFIG_MSM_GCC_8916) += gcc-msm8916.o

obj-$(CONFIG_MSM_GCC_8916) += gcc-msm8916.o

obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o

obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o