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Commit d53abe56 authored by Sarthak Garg's avatar Sarthak Garg
Browse files

ARM: dts: qcom: Add eMMC and SDCard support for scuba

Add eMMC and SDCard support for scuba target.

Change-Id: Ie889cba7c81dee23e9f9da0dbc8e3333b4a66c33
parent 6956cd16
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+137 −0
Original line number Diff line number Diff line
@@ -35,5 +35,142 @@
				};
			};
		};
		/* SDC pin type */
		sdc1_clk_on: sdc1_clk_on {
			config {
				pins = "sdc1_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc1_clk_off: sdc1_clk_off {
			config {
				pins = "sdc1_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc1_cmd_on: sdc1_cmd_on {
			config {
				pins = "sdc1_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc1_cmd_off: sdc1_cmd_off {
			config {
				pins = "sdc1_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc1_data_on: sdc1_data_on {
			config {
				pins = "sdc1_data";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc1_data_off: sdc1_data_off {
			config {
				pins = "sdc1_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc1_rclk_on: sdc1_rclk_on {
			config {
				pins = "sdc1_rclk";
				bias-pull-down; /* pull down */
			};
		};

		sdc1_rclk_off: sdc1_rclk_off {
			config {
				pins = "sdc1_rclk";
				bias-pull-down; /* pull down */
			};
		};

		sdc2_clk_on: sdc2_clk_on {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_off: sdc2_clk_off {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cmd_on: sdc2_cmd_on {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_cmd_off: sdc2_cmd_off {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_data_on: sdc2_data_on {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_data_off: sdc2_data_off {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cd_on: cd_on {
			mux {
				pins = "gpio88";
				function = "gpio";
			};

			config {
				pins = "gpio88";
				drive-strength = <2>;
				bias-pull-up;
			};
		};

		sdc2_cd_off: cd_off {
			mux {
				pins = "gpio88";
				function = "gpio";
			};

			config {
				pins = "gpio88";
				drive-strength = <2>;
				bias-disable;
			};
		};

	};
};
+46 −0
Original line number Diff line number Diff line
@@ -36,3 +36,49 @@
		dr_mode = "peripheral";
	};
};

&sdhc_1 {
	vdd-supply = <&L19A>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&L14A>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 325000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
					&sdc1_rclk_on>;
	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
					&sdc1_rclk_off>;

	qcom,clk-rates = <400000 20000000 25000000 50000000>;
	qcom,bus-speed-mode = "DDR_1p8v";

	/delete-property/qcom,devfreq,freq-table;

	status = "ok";
};

&sdhc_2 {
	vdd-supply = <&L21A>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&L4A>;
	qcom,vdd-io-voltage-level = <1800000 2960000>;
	qcom,vdd-io-current-level = <0 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;

	qcom,clk-rates = <400000 20000000 25000000 50000000>;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50";

	/delete-property/qcom,devfreq,freq-table;

	status = "ok";
};
+62 −0
Original line number Diff line number Diff line
@@ -14,6 +14,11 @@
	#size-cells = <2>;
	memory { device_type = "memory"; reg = <0 0 0 0>; };

	aliases {
		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
		sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;
@@ -661,6 +666,63 @@
			qcom,dump-id = <0xe8>;
		};
	};

	sdhc_1: sdhci@4744000 {
		compatible = "qcom,sdhci-msm-v5", "qcom,sdhci-msm-cqe";
		reg = <0x4744000 0x1000>, <0x4745000 0x1000>;
		reg-names = "hc_mem", "cqhci_mem";

		interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <8>;
		qcom,large-address-bus;

		qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
						192000000 384000000>;
		qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";

		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,scaling-lower-bus-speed-mode = "DDR52";

		clocks = <&gcc GCC_SDCC1_AHB_CLK>,
			<&gcc GCC_SDCC1_APPS_CLK>,
			<&gcc GCC_SDCC1_ICE_CORE_CLK>;
		clock-names = "iface_clk", "core_clk", "ice_core_clk";

		qcom,ice-clk-rates = <300000000 100000000>;

		qcom,nonremovable;
		status = "disabled";
	};

	sdhc_2: sdhci@4784000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x4784000 0x1000>;
		reg-names = "hc_mem";

		interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <4>;
		qcom,large-address-bus;

		qcom,clk-rates = <400000 20000000 25000000
				50000000 100000000 202000000>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
				      "SDR104";

		qcom,devfreq,freq-table = <50000000 202000000>;

		clocks = <&gcc GCC_SDCC2_AHB_CLK>,
			<&gcc GCC_SDCC2_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";
		status = "disabled";
	};

	clocks {
		xo_board: xo-board {
			compatible = "fixed-clock";