Loading qcom/msm8937-mdss.dtsi +4 −0 Original line number Original line Diff line number Diff line Loading @@ -174,11 +174,15 @@ smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb { smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb { compatible = "qcom,smmu_mdp_unsec"; compatible = "qcom,smmu_mdp_unsec"; iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */ iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */ qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; qcom,iommu-earlymap; /* for cont-splash */ }; }; smmu_mdp_sec: qcom,smmu_mdp_sec_cb { smmu_mdp_sec: qcom,smmu_mdp_sec_cb { compatible = "qcom,smmu_mdp_sec"; compatible = "qcom,smmu_mdp_sec"; iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */ iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */ qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; }; }; mdss_fb0: qcom,mdss_fb_primary { mdss_fb0: qcom,mdss_fb_primary { Loading Loading
qcom/msm8937-mdss.dtsi +4 −0 Original line number Original line Diff line number Diff line Loading @@ -174,11 +174,15 @@ smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb { smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb { compatible = "qcom,smmu_mdp_unsec"; compatible = "qcom,smmu_mdp_unsec"; iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */ iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */ qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; qcom,iommu-earlymap; /* for cont-splash */ }; }; smmu_mdp_sec: qcom,smmu_mdp_sec_cb { smmu_mdp_sec: qcom,smmu_mdp_sec_cb { compatible = "qcom,smmu_mdp_sec"; compatible = "qcom,smmu_mdp_sec"; iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */ iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */ qcom,iommu-dma-addr-pool = <0x08000000 0xF8000000>; }; }; mdss_fb0: qcom,mdss_fb_primary { mdss_fb0: qcom,mdss_fb_primary { Loading