mfd: Add support for ams AS3722 PMIC

* ams AS3722 Power management IC.

Required properties:

-------------------

- compatible: Must be "ams,as3722".

- reg: I2C device address.

- interrupt-controller: AS3722 has internal interrupt controller which takes the

  interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well

  as external input.

- #interrupt-cells: Should be set to 2 for IRQ number and flags.

  The first cell is the IRQ number. IRQ numbers for different interrupt source

  of AS3722 are defined at dt-bindings/mfd/as3722.h

  The second cell is the flags, encoded as the trigger masks from binding document

	interrupts.txt, using dt-bindings/irq.

Optional submodule and their properties:

=======================================

Pinmux and GPIO:

===============

Device has 8 GPIO pins which can be configured as GPIO as well as the special IO

functions.

Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".

Following are properties which is needed if GPIO and pinmux functionality

is required:

    Required properties:

    -------------------

	- gpio-controller: Marks the device node as a GPIO controller.

	- #gpio-cells: Number of GPIO cells. Refer to binding document

			gpio/gpio.txt

    Optional properties:

    --------------------

	Following properties are require if pin control setting is required

	at boot.

	- pinctrl-names: A pinctrl state named "default" be defined, using the

		bindings in pinctrl/pinctrl-binding.txt.

	- pinctrl[0...n]: Properties to contain the phandle that refer to

		different nodes of pin control settings. These nodes represents

		the pin control setting of state 0 to state n. Each of these

		nodes contains different subnodes to represents some desired

		configuration for a list of pins. This configuration can

		include the mux function to select on those pin(s), and

		various pin configuration parameters, such as pull-up,

		open drain.

		Each subnode have following properties:

		Required properties:

		    - pins: List of pins. Valid values of pins properties are:

				gpio0, gpio1, gpio2, gpio3, gpio4, gpio5,

				gpio6, gpio7

		Optional properties:

			function, bias-disable, bias-pull-up, bias-pull-down,

			bias-high-impedance, drive-open-drain.

			Valid values for function properties are:

				gpio, interrupt-out, gpio-in-interrupt,

				vsup-vbat-low-undebounce-out,

				vsup-vbat-low-debounce-out,

				voltage-in-standby, oc-pg-sd0, oc-pg-sd6,

				powergood-out, pwm-in, pwm-out, clk32k-out,

				watchdog-in, soft-reset-in

Regulators:

===========

Device has multiple DCDC and LDOs. The node "regulators" is require if regulator

functionality is needed.

Following are properties of regulator subnode.

    Optional properties:

    -------------------

	The input supply of regulators are the optional properties on the

	regulator node. The input supply of these regulators are provided

	through following properties:

		vsup-sd2-supply: Input supply for SD2.

		vsup-sd3-supply: Input supply for SD3.

		vsup-sd4-supply: Input supply for SD4.

		vsup-sd5-supply: Input supply for SD5.

		vin-ldo0-supply: Input supply for LDO0.

		vin-ldo1-6-supply: Input supply for LDO1 and LDO6.

		vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.

		vin-ldo3-4-supply: Input supply for LDO3 and LDO4.

		vin-ldo9-10-supply: Input supply for LDO9 and LDO10.

		vin-ldo11-supply: Input supply for LDO11.

    Optional sub nodes for regulators:

    ---------------------------------

	The subnodes name is the name of regulator and it must be one of:

	sd[0-6], ldo[0-7], ldo[9-11]

	Each sub-node should contain the constraints and initialization

	information for that regulator. See regulator.txt for a description

	of standard properties for these sub-nodes.

	Additional optional custom properties  are listed below.

		ams,ext-control: External control of the rail. The option of

			this properties will tell which external input is

			controlling this rail. Valid values are 0, 1, 2 ad 3.

			0: There is no external control of this rail.

			1: Rail is controlled by ENABLE1 input pin.

			2: Rail is controlled by ENABLE2 input pin.

			3: Rail is controlled by ENABLE3 input pin.

			Missing this property on DT will be assume as no

			external control. The external control pin macros

			are defined @dt-bindings/mfd/as3722.h

		ams,enable-tracking: Enable tracking with SD1, only supported

			by LDO3.

Example:

--------

#include <dt-bindings/mfd/as3722.h>

...

ams3722 {

	compatible = "ams,as3722";

	reg = <0x48>;

	interrupt-parent = <&intc>;

	interrupt-controller;

	#interrupt-cells = <2>;

	gpio-controller;

	#gpio-cells = <2>;

	pinctrl-names = "default";

	pinctrl-0 = <&as3722_default>;

	as3722_default: pinmux {

			gpio0 {

				pins = "gpio0";

				function = "gpio";

				bias-pull-down;

			};

			gpio1_2_4_7 {

				pins = "gpio1", "gpio2", "gpio4", "gpio7";

				function = "gpio";

				bias-pull-up;

			};

			gpio5 {

				pins = "gpio5";

				function = "clk32k_out";

			};

	}

	regulators {

			vsup-sd2-supply = <...>;

			...

			sd0 {

				regulator-name = "vdd_cpu";

				regulator-min-microvolt = <700000>;

				regulator-max-microvolt = <1400000>;

				regulator-always-on;

				ams,ext-control = <2>;

			};

			sd1 {

				regulator-name = "vdd_core";

				regulator-min-microvolt = <700000>;

				regulator-max-microvolt = <1400000>;

				regulator-always-on;

				ams,ext-control = <1>;

			};

			sd2 {

				regulator-name = "vddio_ddr";

				regulator-min-microvolt = <1350000>;

				regulator-max-microvolt = <1350000>;

				regulator-always-on;

			};

			sd4 {

				regulator-name = "avdd-hdmi-pex";

				regulator-min-microvolt = <1050000>;

				regulator-max-microvolt = <1050000>;

				regulator-always-on;

			};

			sd5 {

				regulator-name = "vdd-1v8";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

			};

			....

	};

};

	help

	  Support for the AS3711 PMIC from AMS

config MFD_AS3722

	bool "ams AS3722 Power Management IC"

	select MFD_CORE

	select REGMAP_I2C

	select REGMAP_IRQ

	depends on I2C && OF

	help

	  The ams AS3722 is a compact system PMU suitable for mobile phones,

	  tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down

	  controllers, 11 LDOs, RTC, automatic battery, temperature and

	  over current monitoring, GPIOs, ADC and a watchdog.

config PMIC_ADP5520

	bool "Analog Devices ADP5520/01 MFD PMIC Core Support"

	depends on I2C=y

obj-$(CONFIG_VEXPRESS_CONFIG)	+= vexpress-config.o vexpress-sysreg.o

obj-$(CONFIG_MFD_RETU)		+= retu-mfd.o

obj-$(CONFIG_MFD_AS3711)	+= as3711.o

obj-$(CONFIG_MFD_AS3722)	+= as3722.o

obj-$(CONFIG_MFD_STW481X)	+= stw481x.o

/*

 * Core driver for ams AS3722 PMICs

 *

 * Copyright (C) 2013 AMS AG

 * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.

 *

 * Author: Florian Lobmaier <florian.lobmaier@ams.com>

 * Author: Laxman Dewangan <ldewangan@nvidia.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */

#include <linux/err.h>

#include <linux/i2c.h>

#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/mfd/core.h>

#include <linux/mfd/as3722.h>

#include <linux/of.h>

#include <linux/regmap.h>

#include <linux/slab.h>

#define AS3722_DEVICE_ID	0x0C

static const struct resource as3722_rtc_resource[] = {

	{

		.name = "as3722-rtc-alarm",

		.start = AS3722_IRQ_RTC_ALARM,

		.end = AS3722_IRQ_RTC_ALARM,

		.flags = IORESOURCE_IRQ,

	},

};

static const struct resource as3722_adc_resource[] = {

	{

		.name = "as3722-adc",

		.start = AS3722_IRQ_ADC,

		.end = AS3722_IRQ_ADC,

		.flags = IORESOURCE_IRQ,

	},

};

static struct mfd_cell as3722_devs[] = {

	{

		.name = "as3722-pinctrl",

	},

	{

		.name = "as3722-regulator",

	},

	{

		.name = "as3722-rtc",

		.num_resources = ARRAY_SIZE(as3722_rtc_resource),

		.resources = as3722_rtc_resource,

	},

	{

		.name = "as3722-adc",

		.num_resources = ARRAY_SIZE(as3722_adc_resource),

		.resources = as3722_adc_resource,

	},

	{

		.name = "as3722-power-off",

	},

};

static const struct regmap_irq as3722_irqs[] = {

	/* INT1 IRQs */

	[AS3722_IRQ_LID] = {

		.mask = AS3722_INTERRUPT_MASK1_LID,

	},

	[AS3722_IRQ_ACOK] = {

		.mask = AS3722_INTERRUPT_MASK1_ACOK,

	},

	[AS3722_IRQ_ENABLE1] = {

		.mask = AS3722_INTERRUPT_MASK1_ENABLE1,

	},

	[AS3722_IRQ_OCCUR_ALARM_SD0] = {

		.mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0,

	},

	[AS3722_IRQ_ONKEY_LONG_PRESS] = {

		.mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG,

	},

	[AS3722_IRQ_ONKEY] = {

		.mask = AS3722_INTERRUPT_MASK1_ONKEY,

	},

	[AS3722_IRQ_OVTMP] = {

		.mask = AS3722_INTERRUPT_MASK1_OVTMP,

	},

	[AS3722_IRQ_LOWBAT] = {

		.mask = AS3722_INTERRUPT_MASK1_LOWBAT,

	},

	/* INT2 IRQs */

	[AS3722_IRQ_SD0_LV] = {

		.mask = AS3722_INTERRUPT_MASK2_SD0_LV,

		.reg_offset = 1,

	},

	[AS3722_IRQ_SD1_LV] = {

		.mask = AS3722_INTERRUPT_MASK2_SD1_LV,

		.reg_offset = 1,

	},

	[AS3722_IRQ_SD2_LV] = {

		.mask = AS3722_INTERRUPT_MASK2_SD2345_LV,

		.reg_offset = 1,

	},

	[AS3722_IRQ_PWM1_OV_PROT] = {

		.mask = AS3722_INTERRUPT_MASK2_PWM1_OV_PROT,

		.reg_offset = 1,

	},

	[AS3722_IRQ_PWM2_OV_PROT] = {

		.mask = AS3722_INTERRUPT_MASK2_PWM2_OV_PROT,

		.reg_offset = 1,

	},

	[AS3722_IRQ_ENABLE2] = {

		.mask = AS3722_INTERRUPT_MASK2_ENABLE2,

		.reg_offset = 1,

	},

	[AS3722_IRQ_SD6_LV] = {

		.mask = AS3722_INTERRUPT_MASK2_SD6_LV,

		.reg_offset = 1,

	},

	[AS3722_IRQ_RTC_REP] = {

		.mask = AS3722_INTERRUPT_MASK2_RTC_REP,

		.reg_offset = 1,

	},

	/* INT3 IRQs */

	[AS3722_IRQ_RTC_ALARM] = {

		.mask = AS3722_INTERRUPT_MASK3_RTC_ALARM,

		.reg_offset = 2,

	},

	[AS3722_IRQ_GPIO1] = {

		.mask = AS3722_INTERRUPT_MASK3_GPIO1,

		.reg_offset = 2,

	},

	[AS3722_IRQ_GPIO2] = {

		.mask = AS3722_INTERRUPT_MASK3_GPIO2,

		.reg_offset = 2,

	},

	[AS3722_IRQ_GPIO3] = {

		.mask = AS3722_INTERRUPT_MASK3_GPIO3,

		.reg_offset = 2,

	},

	[AS3722_IRQ_GPIO4] = {

		.mask = AS3722_INTERRUPT_MASK3_GPIO4,

		.reg_offset = 2,

	},

	[AS3722_IRQ_GPIO5] = {

		.mask = AS3722_INTERRUPT_MASK3_GPIO5,

		.reg_offset = 2,

	},

	[AS3722_IRQ_WATCHDOG] = {

		.mask = AS3722_INTERRUPT_MASK3_WATCHDOG,

		.reg_offset = 2,

	},

	[AS3722_IRQ_ENABLE3] = {

		.mask = AS3722_INTERRUPT_MASK3_ENABLE3,

		.reg_offset = 2,

	},

	/* INT4 IRQs */

	[AS3722_IRQ_TEMP_SD0_SHUTDOWN] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN,

		.reg_offset = 3,

	},

	[AS3722_IRQ_TEMP_SD1_SHUTDOWN] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN,

		.reg_offset = 3,

	},

	[AS3722_IRQ_TEMP_SD2_SHUTDOWN] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN,

		.reg_offset = 3,

	},

	[AS3722_IRQ_TEMP_SD0_ALARM] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM,

		.reg_offset = 3,

	},

	[AS3722_IRQ_TEMP_SD1_ALARM] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM,

		.reg_offset = 3,

	},

	[AS3722_IRQ_TEMP_SD6_ALARM] = {

		.mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM,

		.reg_offset = 3,

	},

	[AS3722_IRQ_OCCUR_ALARM_SD6] = {

		.mask = AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6,

		.reg_offset = 3,

	},

	[AS3722_IRQ_ADC] = {

		.mask = AS3722_INTERRUPT_MASK4_ADC,

		.reg_offset = 3,

	},

};

static const struct regmap_irq_chip as3722_irq_chip = {

	.name = "as3722",

	.irqs = as3722_irqs,

	.num_irqs = ARRAY_SIZE(as3722_irqs),

	.num_regs = 4,

	.status_base = AS3722_INTERRUPT_STATUS1_REG,

	.mask_base = AS3722_INTERRUPT_MASK1_REG,

};

static int as3722_check_device_id(struct as3722 *as3722)

{

	u32 val;

	int ret;

	/* Check that this is actually a AS3722 */

	ret = as3722_read(as3722, AS3722_ASIC_ID1_REG, &val);

	if (ret < 0) {

		dev_err(as3722->dev, "ASIC_ID1 read failed: %d\n", ret);

		return ret;

	}

	if (val != AS3722_DEVICE_ID) {

		dev_err(as3722->dev, "Device is not AS3722, ID is 0x%x\n", val);

		return -ENODEV;

	}

	ret = as3722_read(as3722, AS3722_ASIC_ID2_REG, &val);

	if (ret < 0) {

		dev_err(as3722->dev, "ASIC_ID2 read failed: %d\n", ret);

		return ret;

	}

	dev_info(as3722->dev, "AS3722 with revision 0x%x found\n", val);

	return 0;

}

static int as3722_configure_pullups(struct as3722 *as3722)

{

	int ret;

	u32 val = 0;

	if (as3722->en_intern_int_pullup)

		val |= AS3722_INT_PULL_UP;

	if (as3722->en_intern_i2c_pullup)

		val |= AS3722_I2C_PULL_UP;

	ret = as3722_update_bits(as3722, AS3722_IOVOLTAGE_REG,

			AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, val);

	if (ret < 0)

		dev_err(as3722->dev, "IOVOLTAGE_REG update failed: %d\n", ret);

	return ret;

}

static const struct regmap_range as3722_readable_ranges[] = {

	regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG),

	regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG),

	regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_REG_SEQU_MOD3_REG),

	regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG),

	regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG),

	regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG,

					AS3722_BATTERY_VOLTAGE_MONITOR2_REG),

	regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG),

	regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG),

	regmap_reg_range(AS3722_RTC_ACCESS_REG, AS3722_RTC_ACCESS_REG),

	regmap_reg_range(AS3722_RTC_STATUS_REG, AS3722_TEMP_STATUS_REG),

	regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC_CONFIGURATION_REG),

	regmap_reg_range(AS3722_ASIC_ID1_REG, AS3722_ASIC_ID2_REG),

	regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG),

};

static const struct regmap_access_table as3722_readable_table = {

	.yes_ranges = as3722_readable_ranges,

	.n_yes_ranges = ARRAY_SIZE(as3722_readable_ranges),

};

static const struct regmap_range as3722_writable_ranges[] = {

	regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG),

	regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG),

	regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_GPIO_SIGNAL_OUT_REG),

	regmap_reg_range(AS3722_REG_SEQU_MOD1_REG, AS3722_REG_SEQU_MOD3_REG),

	regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG),

	regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG),

	regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG,

					AS3722_BATTERY_VOLTAGE_MONITOR2_REG),

	regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG),

	regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG),

	regmap_reg_range(AS3722_INTERRUPT_MASK1_REG, AS3722_TEMP_STATUS_REG),

	regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC1_CONTROL_REG),

	regmap_reg_range(AS3722_ADC1_THRESHOLD_HI_MSB_REG,

					AS3722_ADC_CONFIGURATION_REG),

	regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG),

};

static const struct regmap_access_table as3722_writable_table = {

	.yes_ranges = as3722_writable_ranges,

	.n_yes_ranges = ARRAY_SIZE(as3722_writable_ranges),

};

static const struct regmap_range as3722_cacheable_ranges[] = {

	regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_LDO11_VOLTAGE_REG),

	regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_LDOCONTROL1_REG),

};

static const struct regmap_access_table as3722_volatile_table = {

	.no_ranges = as3722_cacheable_ranges,

	.n_no_ranges = ARRAY_SIZE(as3722_cacheable_ranges),

};

const struct regmap_config as3722_regmap_config = {

	.reg_bits = 8,

	.val_bits = 8,

	.max_register = AS3722_MAX_REGISTER,

	.cache_type = REGCACHE_RBTREE,

	.rd_table = &as3722_readable_table,

	.wr_table = &as3722_writable_table,

	.volatile_table = &as3722_volatile_table,

};

static int as3722_i2c_of_probe(struct i2c_client *i2c,

			struct as3722 *as3722)

{

	struct device_node *np = i2c->dev.of_node;

	struct irq_data *irq_data;

	if (!np) {

		dev_err(&i2c->dev, "Device Tree not found\n");

		return -EINVAL;

	}

	irq_data = irq_get_irq_data(i2c->irq);

	if (!irq_data) {

		dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);

		return -EINVAL;

	}

	as3722->en_intern_int_pullup = of_property_read_bool(np,

					"ams,enable-internal-int-pullup");

	as3722->en_intern_i2c_pullup = of_property_read_bool(np,

					"ams,enable-internal-i2c-pullup");

	as3722->irq_flags = irqd_get_trigger_type(irq_data);

	dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags);

	return 0;

}

static int as3722_i2c_probe(struct i2c_client *i2c,

			const struct i2c_device_id *id)

{

	struct as3722 *as3722;

	unsigned long irq_flags;

	int ret;

	as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL);

	if (!as3722)

		return -ENOMEM;

	as3722->dev = &i2c->dev;

	as3722->chip_irq = i2c->irq;

	i2c_set_clientdata(i2c, as3722);

	ret = as3722_i2c_of_probe(i2c, as3722);

	if (ret < 0)

		return ret;

	as3722->regmap = devm_regmap_init_i2c(i2c, &as3722_regmap_config);

	if (IS_ERR(as3722->regmap)) {

		ret = PTR_ERR(as3722->regmap);

		dev_err(&i2c->dev, "regmap init failed: %d\n", ret);

		return ret;

	}

	ret = as3722_check_device_id(as3722);

	if (ret < 0)

		return ret;

	irq_flags = as3722->irq_flags | IRQF_ONESHOT;

	ret = regmap_add_irq_chip(as3722->regmap, as3722->chip_irq,

			irq_flags, -1, &as3722_irq_chip,

			&as3722->irq_data);

	if (ret < 0) {

		dev_err(as3722->dev, "Failed to add regmap irq: %d\n", ret);

		return ret;

	}

	ret = as3722_configure_pullups(as3722);

	if (ret < 0)

		goto scrub;

	ret = mfd_add_devices(&i2c->dev, -1, as3722_devs,

			ARRAY_SIZE(as3722_devs), NULL, 0,

			regmap_irq_get_domain(as3722->irq_data));

	if (ret) {

		dev_err(as3722->dev, "Failed to add MFD devices: %d\n", ret);

		goto scrub;

	}

	dev_dbg(as3722->dev, "AS3722 core driver initialized successfully\n");

	return 0;

scrub:

	regmap_del_irq_chip(as3722->chip_irq, as3722->irq_data);

	return ret;

}

static int as3722_i2c_remove(struct i2c_client *i2c)

{

	struct as3722 *as3722 = i2c_get_clientdata(i2c);

	mfd_remove_devices(as3722->dev);

	regmap_del_irq_chip(as3722->chip_irq, as3722->irq_data);

	return 0;

}

static const struct of_device_id as3722_of_match[] = {

	{ .compatible = "ams,as3722", },

	{},

};

MODULE_DEVICE_TABLE(of, as3722_of_match);

static const struct i2c_device_id as3722_i2c_id[] = {

	{ "as3722", 0 },

	{},

};

MODULE_DEVICE_TABLE(i2c, as3722_i2c_id);

static struct i2c_driver as3722_i2c_driver = {

	.driver = {

		.name = "as3722",

		.owner = THIS_MODULE,

		.of_match_table = as3722_of_match,

	},

	.probe = as3722_i2c_probe,

	.remove = as3722_i2c_remove,

	.id_table = as3722_i2c_id,

};

module_i2c_driver(as3722_i2c_driver);

MODULE_DESCRIPTION("I2C support for AS3722 PMICs");

MODULE_AUTHOR("Florian Lobmaier <florian.lobmaier@ams.com>");

MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");

MODULE_LICENSE("GPL");

/*

 * This header provides macros for ams AS3722 device bindings.

 *

 * Copyright (c) 2013, NVIDIA Corporation.

 *

 * Author: Laxman Dewangan <ldewangan@nvidia.com>

 *

 */

#ifndef __DT_BINDINGS_AS3722_H__

#define __DT_BINDINGS_AS3722_H__

/* External control pins */

#define AS3722_EXT_CONTROL_PIN_ENABLE1 1

#define AS3722_EXT_CONTROL_PIN_ENABLE2 2

#define AS3722_EXT_CONTROL_PIN_ENABLE2 3

/* Interrupt numbers for AS3722 */

#define AS3722_IRQ_LID			0

#define AS3722_IRQ_ACOK			1

#define AS3722_IRQ_ENABLE1		2

#define AS3722_IRQ_OCCUR_ALARM_SD0	3

#define AS3722_IRQ_ONKEY_LONG_PRESS	4

#define AS3722_IRQ_ONKEY		5

#define AS3722_IRQ_OVTMP		6

#define AS3722_IRQ_LOWBAT		7

#define AS3722_IRQ_SD0_LV		8

#define AS3722_IRQ_SD1_LV		9

#define AS3722_IRQ_SD2_LV		10

#define AS3722_IRQ_PWM1_OV_PROT		11

#define AS3722_IRQ_PWM2_OV_PROT		12

#define AS3722_IRQ_ENABLE2		13

#define AS3722_IRQ_SD6_LV		14

#define AS3722_IRQ_RTC_REP		15

#define AS3722_IRQ_RTC_ALARM		16

#define AS3722_IRQ_GPIO1		17

#define AS3722_IRQ_GPIO2		18

#define AS3722_IRQ_GPIO3		19

#define AS3722_IRQ_GPIO4		20

#define AS3722_IRQ_GPIO5		21

#define AS3722_IRQ_WATCHDOG		22

#define AS3722_IRQ_ENABLE3		23

#define AS3722_IRQ_TEMP_SD0_SHUTDOWN	24

#define AS3722_IRQ_TEMP_SD1_SHUTDOWN	25

#define AS3722_IRQ_TEMP_SD2_SHUTDOWN	26

#define AS3722_IRQ_TEMP_SD0_ALARM	27

#define AS3722_IRQ_TEMP_SD1_ALARM	28

#define AS3722_IRQ_TEMP_SD6_ALARM	29

#define AS3722_IRQ_OCCUR_ALARM_SD6	30

#define AS3722_IRQ_ADC			31

#endif /* __DT_BINDINGS_AS3722_H__ */