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Commit d3ed7402 authored by Marek Olšák's avatar Marek Olšák Committed by Dave Airlie
Browse files

drm/radeon/kms: add a new gem_wait ioctl with read/write flags 



The new DRM_RADEON_GEM_WAIT ioctl combines GEM_WAIT_IDLE and GEM_BUSY (there
is a NO_WAIT flag to get the latter) with USAGE_READ and USAGE_WRITE flags
to take advantage of the new ttm_bo_wait changes.

Also bump the DRM version.

Signed-off-by: default avatarMarek Olšák <maraeo@gmail.com>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent dfadbbdb

drivers/gpu/drm/radeon/radeon.h

+2 −0
Original line number Diff line number Diff line
@@ -1143,6 +1143,8 @@ int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, 
				struct drm_file *filp);

int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,

				struct drm_file *filp);

int radeon_gem_wait_ioctl(struct drm_device *dev, void *data,

			  struct drm_file *filp);



/* VRAM scratch page for HDP bug */

struct r700_vram_scratch {

drivers/gpu/drm/radeon/radeon_cs.c

+4 −1
Original line number Diff line number Diff line
@@ -80,7 +80,10 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p) 
			p->relocs[i].lobj.wdomain = r->write_domain;

			p->relocs[i].lobj.rdomain = r->read_domains;

			p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;

			p->relocs[i].lobj.tv.usage = TTM_USAGE_READWRITE;

			if (r->read_domains)

				p->relocs[i].lobj.tv.usage |= TTM_USAGE_READ;

			if (r->write_domain)

				p->relocs[i].lobj.tv.usage |= TTM_USAGE_WRITE;

			p->relocs[i].handle = r->handle;

			p->relocs[i].flags = r->flags;

			radeon_bo_list_add_object(&p->relocs[i].lobj,

drivers/gpu/drm/radeon/radeon_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -52,9 +52,10 @@ 
 *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query

 *   2.10.0 - fusion 2D tiling

 *   2.11.0 - backend map, initial compute support for the CS checker

 *   2.12.0 - DRM_RADEON_GEM_WAIT ioctl

 */

#define KMS_DRIVER_MAJOR	2

#define KMS_DRIVER_MINOR	11

#define KMS_DRIVER_MINOR	12

#define KMS_DRIVER_PATCHLEVEL	0

int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);

int radeon_driver_unload_kms(struct drm_device *dev);

drivers/gpu/drm/radeon/radeon_gem.c

+33 −3
Original line number Diff line number Diff line
@@ -122,7 +122,7 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj, 
	}

	if (domain == RADEON_GEM_DOMAIN_CPU) {

		/* Asking for cpu access wait for object idle */

		r = radeon_bo_wait(robj, NULL, false);

		r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);

		if (r) {

			printk(KERN_ERR "Failed to wait for object !\n");

			return r;
@@ -273,7 +273,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, 
		return -ENOENT;

	}

	robj = gem_to_radeon_bo(gobj);

	r = radeon_bo_wait(robj, &cur_placement, true);

	r = radeon_bo_wait(robj, &cur_placement, true, TTM_USAGE_READWRITE);

	switch (cur_placement) {

	case TTM_PL_VRAM:

		args->domain = RADEON_GEM_DOMAIN_VRAM;
@@ -303,7 +303,7 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 
		return -ENOENT;

	}

	robj = gem_to_radeon_bo(gobj);

	r = radeon_bo_wait(robj, NULL, false);

	r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);

	/* callback hw specific functions if any */

	if (robj->rdev->asic->ioctl_wait_idle)

		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
@@ -311,6 +311,36 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 
	return r;

}



int radeon_gem_wait_ioctl(struct drm_device *dev, void *data,

			  struct drm_file *filp)

{

	struct drm_radeon_gem_wait *args = data;

	struct drm_gem_object *gobj;

	struct radeon_bo *robj;

	bool no_wait = (args->flags & RADEON_GEM_NO_WAIT) != 0;

	enum ttm_buffer_usage usage = 0;

	int r;



	if (args->flags & RADEON_GEM_USAGE_READ)

		usage |= TTM_USAGE_READ;

	if (args->flags & RADEON_GEM_USAGE_WRITE)

		usage |= TTM_USAGE_WRITE;

	if (!usage)

		usage = TTM_USAGE_READWRITE;



	gobj = drm_gem_object_lookup(dev, filp, args->handle);

	if (gobj == NULL) {

		return -ENOENT;

	}

	robj = gem_to_radeon_bo(gobj);

	r = radeon_bo_wait(robj, NULL, no_wait, usage);

	/* callback hw specific functions if any */

	if (!no_wait && robj->rdev->asic->ioctl_wait_idle)

		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);

	drm_gem_object_unreference_unlocked(gobj);

	return r;

}



int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,

				struct drm_file *filp)

{

drivers/gpu/drm/radeon/radeon_kms.c

+1 −0
Original line number Diff line number Diff line
@@ -451,5 +451,6 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = { 
	DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),

	DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),

	DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),

	DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT, radeon_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),

};

int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);