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Commit d3c4087a authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge 247f2934 ("drm/msm/mdp5: Fix global state lock backoff") into android-mainline



Steps on the way to 4.19.256

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Change-Id: I8e0fb22114e125c4b7302d4017b43a39e78340f4
parents a3463637 247f2934
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+1 −1
Original line number Original line Diff line number Diff line
@@ -5,7 +5,7 @@


/ {
/ {
	model = "AST2500 EVB";
	model = "AST2500 EVB";
	compatible = "aspeed,ast2500";
	compatible = "aspeed,ast2500-evb", "aspeed,ast2500";


	aliases {
	aliases {
		serial4 = &uart5;
		serial4 = &uart5;
+15 −14
Original line number Original line Diff line number Diff line
@@ -61,20 +61,18 @@
			reg = <0>;
			reg = <0>;
			clock-latency = <61036>; /* two CLK32 periods */
			clock-latency = <61036>; /* two CLK32 periods */
			#cooling-cells = <2>;
			#cooling-cells = <2>;
			operating-points = <
			operating-points =
				/* kHz	uV */
				/* kHz	uV */
				696000	1275000
				<696000	1275000>,
				528000	1175000
				<528000	1175000>,
				396000	1025000
				<396000	1025000>,
				198000	950000
				<198000	950000>;
			>;
			fsl,soc-operating-points =
			fsl,soc-operating-points = <
				/* KHz	uV */
				/* KHz	uV */
				696000	1275000
				<696000	1275000>,
				528000	1175000
				<528000	1175000>,
				396000	1175000
				<396000	1175000>,
				198000	1175000
				<198000	1175000>;
			>;
			clocks = <&clks IMX6UL_CLK_ARM>,
			clocks = <&clks IMX6UL_CLK_ARM>,
				 <&clks IMX6UL_CLK_PLL2_BUS>,
				 <&clks IMX6UL_CLK_PLL2_BUS>,
				 <&clks IMX6UL_CLK_PLL2_PFD2>,
				 <&clks IMX6UL_CLK_PLL2_PFD2>,
@@ -169,6 +167,9 @@
		ocram: sram@900000 {
		ocram: sram@900000 {
			compatible = "mmio-sram";
			compatible = "mmio-sram";
			reg = <0x00900000 0x20000>;
			reg = <0x00900000 0x20000>;
			ranges = <0 0x00900000 0x20000>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
		};


		dma_apbh: dma-apbh@1804000 {
		dma_apbh: dma-apbh@1804000 {
@@ -939,7 +940,7 @@
			};
			};


			lcdif: lcdif@21c8000 {
			lcdif: lcdif@21c8000 {
				compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
				compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
				reg = <0x021c8000 0x4000>;
				reg = <0x021c8000 0x4000>;
				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
				clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
@@ -952,7 +953,7 @@
			qspi: qspi@21e0000 {
			qspi: qspi@21e0000 {
				#address-cells = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				#size-cells = <0>;
				compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
				compatible = "fsl,imx6ul-qspi";
				reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
				reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+1 −0
Original line number Original line Diff line number Diff line
@@ -25,6 +25,7 @@
			compatible = "qcom,spmi-temp-alarm";
			compatible = "qcom,spmi-temp-alarm";
			reg = <0x2400>;
			reg = <0x2400>;
			interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
			interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
			#thermal-sensor-cells = <0>;
		};
		};
	};
	};


+8 −8
Original line number Original line Diff line number Diff line
@@ -43,8 +43,8 @@ ENDPROC(_find_first_zero_bit_le)
 * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
 * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
 */
 */
ENTRY(_find_next_zero_bit_le)
ENTRY(_find_next_zero_bit_le)
		teq	r1, #0
		cmp	r2, r1
		beq	3b
		bhs	3b
		ands	ip, r2, #7
		ands	ip, r2, #7
		beq	1b			@ If new byte, goto old routine
		beq	1b			@ If new byte, goto old routine
 ARM(		ldrb	r3, [r0, r2, lsr #3]	)
 ARM(		ldrb	r3, [r0, r2, lsr #3]	)
@@ -84,8 +84,8 @@ ENDPROC(_find_first_bit_le)
 * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
 * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
 */
 */
ENTRY(_find_next_bit_le)
ENTRY(_find_next_bit_le)
		teq	r1, #0
		cmp	r2, r1
		beq	3b
		bhs	3b
		ands	ip, r2, #7
		ands	ip, r2, #7
		beq	1b			@ If new byte, goto old routine
		beq	1b			@ If new byte, goto old routine
 ARM(		ldrb	r3, [r0, r2, lsr #3]	)
 ARM(		ldrb	r3, [r0, r2, lsr #3]	)
@@ -118,8 +118,8 @@ ENTRY(_find_first_zero_bit_be)
ENDPROC(_find_first_zero_bit_be)
ENDPROC(_find_first_zero_bit_be)


ENTRY(_find_next_zero_bit_be)
ENTRY(_find_next_zero_bit_be)
		teq	r1, #0
		cmp	r2, r1
		beq	3b
		bhs	3b
		ands	ip, r2, #7
		ands	ip, r2, #7
		beq	1b			@ If new byte, goto old routine
		beq	1b			@ If new byte, goto old routine
		eor	r3, r2, #0x18		@ big endian byte ordering
		eor	r3, r2, #0x18		@ big endian byte ordering
@@ -152,8 +152,8 @@ ENTRY(_find_first_bit_be)
ENDPROC(_find_first_bit_be)
ENDPROC(_find_first_bit_be)


ENTRY(_find_next_bit_be)
ENTRY(_find_next_bit_be)
		teq	r1, #0
		cmp	r2, r1
		beq	3b
		bhs	3b
		ands	ip, r2, #7
		ands	ip, r2, #7
		beq	1b			@ If new byte, goto old routine
		beq	1b			@ If new byte, goto old routine
		eor	r3, r2, #0x18		@ big endian byte ordering
		eor	r3, r2, #0x18		@ big endian byte ordering
+1 −0
Original line number Original line Diff line number Diff line
@@ -54,6 +54,7 @@ int __init bcm_kona_smc_init(void)
		return -ENODEV;
		return -ENODEV;


	prop_val = of_get_address(node, 0, &prop_size, NULL);
	prop_val = of_get_address(node, 0, &prop_size, NULL);
	of_node_put(node);
	if (!prop_val)
	if (!prop_val)
		return -EINVAL;
		return -EINVAL;


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