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Commit d3352154 authored by Michal Simek's avatar Michal Simek Committed by Greg Kroah-Hartman
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tty: serial: uartlite: Specify time for sending chars 



Xilinx MDM (Microblaze Debug Module) also contains
uart interface via JTAG which is compatible with
uartlite driver. This interface is really slow
that's why timeout is setup to 1s.

Make this time delay not to be cpu speed dependent.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Acked-by: default avatarPeter Korsgaard <peter@korsgaard.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent ac623914

drivers/tty/serial/uartlite.c

+13 −4
Original line number Diff line number Diff line
@@ -418,14 +418,23 @@ static struct uart_ops ulite_ops = { 
#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE

static void ulite_console_wait_tx(struct uart_port *port)

{

	int i;

	u8 val;

	unsigned long timeout;



	/* Spin waiting for TX fifo to have space available */

	for (i = 0; i < 100000; i++) {

	/*

	 * Spin waiting for TX fifo to have space available.

	 * When using the Microblaze Debug Module this can take up to 1s

	 */

	timeout = jiffies + msecs_to_jiffies(1000);

	while (1) {

		val = uart_in32(ULITE_STATUS, port);

		if ((val & ULITE_STATUS_TXFULL) == 0)

			break;

		if (time_after(jiffies, timeout)) {

			dev_warn(port->dev,

				 "timeout waiting for TX buffer empty\n");

			break;

		}

		cpu_relax();

	}

}