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Commit d2f68a05 authored by Mark Brown's avatar Mark Brown
Browse files

Merge tag 'spi-fix-v4.10-rc4' into spi-linus 

spi: Fixes for v4.10

The usual small smattering of driver specific fixes.  A few bits that
stand out here:

 - The R-Car patches adding fallbacks are just adding new compatible
   strings to the driver so that device trees are written in a more
   robustly future proof fashion, this isn't strictly a fix but it's
   just new IDs and it's better to get it into mainline sooner to
   improve the ABI.
 - The DesignWare "switch to new API part 2" patch is actually a
   misleadingly titled fix for a bit that got missed in the original
   conversion.

# gpg: Signature made Thu 19 Jan 2017 14:54:15 GMT
# gpg:                using RSA key ADE668AA675718B59FE29FEA24D68B725D5487D0
# gpg:                issuer "broonie@kernel.org"
# gpg: key 0D9EACE2CD7BEEBC: no public key for trusted key - skipped
# gpg: key 0D9EACE2CD7BEEBC marked as ultimately trusted
# gpg: key CCB0A420AF88CD16: no public key for trusted key - skipped
# gpg: key CCB0A420AF88CD16 marked as ultimately trusted
# gpg: key 162614E316005C11: no public key for trusted key - skipped
# gpg: key 162614E316005C11 marked as ultimately trusted
# gpg: key A730C53A5621E907: no public key for trusted key - skipped
# gpg: key A730C53A5621E907 marked as ultimately trusted
# gpg: key 276568D75C6153AD: no public key for trusted key - skipped
# gpg: key 276568D75C6153AD marked as ultimately trusted
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" [ultimate]
# gpg:                 aka "Mark Brown <broonie@debian.org>" [ultimate]
# gpg:                 aka "Mark Brown <broonie@kernel.org>" [ultimate]
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>" [ultimate]
# gpg:                 aka "Mark Brown <broonie@linaro.org>" [ultimate]
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>" [ultimate]
parents 69973b83 52cc720c

Documentation/devicetree/bindings/spi/sh-msiof.txt

+14 −6
Original line number Diff line number Diff line 
Renesas MSIOF spi controller



Required properties:

- compatible           : "renesas,msiof-<soctype>" for SoCs,

			 "renesas,sh-msiof" for SuperH, or

			 "renesas,sh-mobile-msiof" for SH Mobile series.

			 Examples with soctypes are:

			 "renesas,msiof-r8a7790" (R-Car H2)

- compatible           : "renesas,msiof-r8a7790" (R-Car H2)

			 "renesas,msiof-r8a7791" (R-Car M2-W)

			 "renesas,msiof-r8a7792" (R-Car V2H)

			 "renesas,msiof-r8a7793" (R-Car M2-N)

			 "renesas,msiof-r8a7794" (R-Car E2)

			 "renesas,msiof-r8a7796" (R-Car M3-W)

			 "renesas,msiof-sh73a0" (SH-Mobile AG5)

			 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)

			 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)

			 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)

			 "renesas,sh-msiof"      (deprecated)



			 When compatible with the generic version, nodes

			 must list the SoC-specific version corresponding

			 to the platform first followed by the generic

			 version.



- reg                  : A list of offsets and lengths of the register sets for

			 the device.

			 If only one register set is present, it is to be used
@@ -60,7 +67,8 @@ Documentation/devicetree/bindings/pinctrl/renesas,*. 
Example:



	msiof0: spi@e6e20000 {

		compatible = "renesas,msiof-r8a7791";

		compatible = "renesas,msiof-r8a7791",

			     "renesas,rcar-gen2-msiof";

		reg = <0 0xe6e20000 0 0x0064>;

		interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;

Documentation/devicetree/bindings/spi/spi-armada-3700.txt

0 → 100644
+25 −0
Original line number Diff line number Diff line 
* Marvell Armada 3700 SPI Controller



Required Properties:



- compatible: should be "marvell,armada-3700-spi"

- reg: physical base address of the controller and length of memory mapped

       region.

- interrupts: The interrupt number. The interrupt specifier format depends on

	      the interrupt controller and of its driver.

- clocks: Must contain the clock source, usually from the North Bridge clocks.

- num-cs: The number of chip selects that is supported by this SPI Controller

- #address-cells: should be 1.

- #size-cells: should be 0.



Example:



	spi0: spi@10600 {

		compatible = "marvell,armada-3700-spi";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x10600 0x5d>;

		clocks = <&nb_perih_clk 7>;

		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;

		num-cs = <4>;

	};

Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt

0 → 100644
+19 −0
Original line number Diff line number Diff line 
* Freescale Low Power SPI (LPSPI) for i.MX



Required properties:

- compatible :

  - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc

- reg : address and length of the lpspi master registers

- interrupt-parent : core interrupt controller

- interrupts : lpspi interrupt

- clocks : lpspi clock specifier



Examples:



lpspi2: lpspi@40290000 {

	compatible = "fsl,imx7ulp-spi";

	reg = <0x40290000 0x10000>;

	interrupt-parent = <&intc>;

	interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&clks IMX7ULP_CLK_LPSPI2>;

};

Documentation/devicetree/bindings/spi/spi-sun6i.txt

+23 −2
Original line number Diff line number Diff line 
Allwinner A31 SPI controller

Allwinner A31/H3 SPI controller



Required properties:

- compatible: Should be "allwinner,sun6i-a31-spi".

- compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".

- reg: Should contain register location and length.

- interrupts: Should contain interrupt.

- clocks: phandle to the clocks feeding the SPI controller. Two are
@@ -12,6 +12,11 @@ Required properties: 
- resets: phandle to the reset controller asserting this device in

          reset



Optional properties:

- dmas: DMA specifiers for rx and tx dma. See the DMA client binding,

	Documentation/devicetree/bindings/dma/dma.txt

- dma-names: DMA request names should include "rx" and "tx" if present.



Example:



spi1: spi@01c69000 {
@@ -22,3 +27,19 @@ spi1: spi@01c69000 { 
	clock-names = "ahb", "mod";

	resets = <&ahb1_rst 21>;

};



spi0: spi@01c68000 {

	compatible = "allwinner,sun8i-h3-spi";

	reg = <0x01c68000 0x1000>;

	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;

	clock-names = "ahb", "mod";

	dmas = <&dma 23>, <&dma 23>;

	dma-names = "rx", "tx";

	pinctrl-names = "default";

	pinctrl-0 = <&spi0_pins>;

	resets = <&ccu RST_BUS_SPI0>;

	status = "disabled";

	#address-cells = <1>;

	#size-cells = <0>;

};

drivers/spi/Kconfig

+17 −3
Original line number Diff line number Diff line
@@ -67,6 +67,13 @@ config SPI_ATH79 
	  This enables support for the SPI controller present on the

	  Atheros AR71XX/AR724X/AR913X SoCs.



config SPI_ARMADA_3700

	tristate "Marvell Armada 3700 SPI Controller"

	depends on (ARCH_MVEBU && OF) || COMPILE_TEST

	help

	  This enables support for the SPI controller present on the

	  Marvell Armada 3700 SoCs.



config SPI_ATMEL

	tristate "Atmel SPI Controller"

	depends on HAS_DMA
@@ -264,6 +271,12 @@ config SPI_FALCON 
	  has only been tested with m25p80 type chips. The hardware has no

	  support for other types of SPI peripherals.



config SPI_FSL_LPSPI

	tristate "Freescale i.MX LPSPI controller"

	depends on ARCH_MXC || COMPILE_TEST

	help

	  This enables Freescale i.MX LPSPI controllers in master mode.



config SPI_GPIO

	tristate "GPIO-based bitbanging SPI Master"

	depends on GPIOLIB || COMPILE_TEST
@@ -365,6 +378,7 @@ config SPI_FSL_SPI 
config SPI_FSL_DSPI

	tristate "Freescale DSPI controller"

	select REGMAP_MMIO

	depends on HAS_DMA

	depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST

	help

	  This enables support for the Freescale DSPI controller in master
@@ -373,7 +387,6 @@ config SPI_FSL_DSPI 
config SPI_FSL_ESPI

	tristate "Freescale eSPI controller"

	depends on FSL_SOC

	select SPI_FSL_LIB

	help

	  This enables using the Freescale eSPI controllers in master mode.

	  From MPC8536, 85xx platform uses the controller, and all P10xx,
@@ -451,7 +464,8 @@ config SPI_ORION 
	tristate "Orion SPI master"

	depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST

	help

	  This enables using the SPI master controller on the Orion chips.

	  This enables using the SPI master controller on the Orion

	  and MVEBU chips.



config SPI_PIC32

	tristate "Microchip PIC32 series SPI"
@@ -553,7 +567,7 @@ config SPI_S3C24XX_FIQ 


config SPI_S3C64XX

	tristate "Samsung S3C64XX series type SPI"

	depends on (PLAT_SAMSUNG || ARCH_EXYNOS)

	depends on (PLAT_SAMSUNG || ARCH_EXYNOS || COMPILE_TEST)

	help

	  SPI driver for Samsung S3C64XX and newer SoCs.