Merge branch 'upstream-fixes' (d22a8ccf) · Commits · e / devices / android_kernel_oneplus_sm7250

arch/i386/kernel/smpboot.c

+1 −2

Original line number	Original line	Diff line number	Diff line
	@@ -1338,8 +1338,7 @@ int __cpu_disable(void)
	if (cpu == 0)		if (cpu == 0)
	return -EBUSY;		return -EBUSY;

	/* We enable the timer again on the exit path of the death loop */		clear_local_APIC();
	disable_APIC_timer();
	/* Allow any queued timer interrupts to get serviced */		/* Allow any queued timer interrupts to get serviced */
	local_irq_enable();		local_irq_enable();
	mdelay(1);		mdelay(1);

arch/i386/mm/ioremap.c

+29 −8

Original line number	Original line	Diff line number	Diff line
	@@ -223,9 +223,15 @@ void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
	}		}
	EXPORT_SYMBOL(ioremap_nocache);		EXPORT_SYMBOL(ioremap_nocache);

			/**
			* iounmap - Free a IO remapping
			* @addr: virtual address from ioremap_*
			*
			* Caller must ensure there is only one unmapping for the same pointer.
			*/
	void iounmap(volatile void __iomem *addr)		void iounmap(volatile void __iomem *addr)
	{		{
	struct vm_struct *p;		struct vm_struct p, o;

	if ((void __force *)addr <= high_memory)		if ((void __force *)addr <= high_memory)
	return;		return;
	@@ -239,22 +245,37 @@ void iounmap(volatile void __iomem *addr)
	addr < phys_to_virt(ISA_END_ADDRESS))		addr < phys_to_virt(ISA_END_ADDRESS))
	return;		return;

	write_lock(&vmlist_lock);		addr = (volatile void *)(PAGE_MASK & (unsigned long __force)addr);
	p = __remove_vm_area((void *)(PAGE_MASK & (unsigned long __force)addr));
			/* Use the vm area unlocked, assuming the caller
			ensures there isn't another iounmap for the same address
			in parallel. Reuse of the virtual address is prevented by
			leaving it in the global lists until we're done with it.
			cpa takes care of the direct mappings. */
			read_lock(&vmlist_lock);
			for (p = vmlist; p; p = p->next) {
			if (p->addr == addr)
			break;
			}
			read_unlock(&vmlist_lock);

	if (!p) {		if (!p) {
	printk(KERN_WARNING "iounmap: bad address %p\n", addr);		printk("iounmap: bad address %p\n", addr);
	dump_stack();		dump_stack();
	goto out_unlock;		return;
	}		}

			/* Reset the direct mapping. Can block */
	if ((p->flags >> 20) && p->phys_addr < virt_to_phys(high_memory) - 1) {		if ((p->flags >> 20) && p->phys_addr < virt_to_phys(high_memory) - 1) {
	change_page_attr(virt_to_page(__va(p->phys_addr)),		change_page_attr(virt_to_page(__va(p->phys_addr)),
	p->size >> PAGE_SHIFT,		p->size >> PAGE_SHIFT,
	PAGE_KERNEL);		PAGE_KERNEL);
	global_flush_tlb();		global_flush_tlb();
	}		}
	out_unlock:
	write_unlock(&vmlist_lock);		/* Finally remove it */
			o = remove_vm_area((void *)addr);
			BUG_ON(p != o \|\| o == NULL);
	kfree(p);		kfree(p);
	}		}
	EXPORT_SYMBOL(iounmap);		EXPORT_SYMBOL(iounmap);

arch/i386/pci/direct.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -13,7 +13,7 @@
	#define PCI_CONF1_ADDRESS(bus, devfn, reg) \		#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
	(0x80000000 \| (bus << 16) \| (devfn << 8) \| (reg & ~3))		(0x80000000 \| (bus << 16) \| (devfn << 8) \| (reg & ~3))

	static int pci_conf1_read(unsigned int seg, unsigned int bus,		int pci_conf1_read(unsigned int seg, unsigned int bus,
	unsigned int devfn, int reg, int len, u32 *value)		unsigned int devfn, int reg, int len, u32 *value)
	{		{
	unsigned long flags;		unsigned long flags;
	@@ -42,7 +42,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
	return 0;		return 0;
	}		}

	static int pci_conf1_write(unsigned int seg, unsigned int bus,		int pci_conf1_write(unsigned int seg, unsigned int bus,
	unsigned int devfn, int reg, int len, u32 value)		unsigned int devfn, int reg, int len, u32 value)
	{		{
	unsigned long flags;		unsigned long flags;

arch/i386/pci/mmconfig.c

+56 −9

Original line number	Original line	Diff line number	Diff line
	@@ -19,21 +19,25 @@
	/* The base address of the last MMCONFIG device accessed */		/* The base address of the last MMCONFIG device accessed */
	static u32 mmcfg_last_accessed_device;		static u32 mmcfg_last_accessed_device;

			static DECLARE_BITMAP(fallback_slots, 32);

	/*		/*
	* Functions for accessing PCI configuration space with MMCONFIG accesses		* Functions for accessing PCI configuration space with MMCONFIG accesses
	*/		*/
	static u32 get_base_addr(unsigned int seg, int bus)		static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
	{		{
	int cfg_num = -1;		int cfg_num = -1;
	struct acpi_table_mcfg_config *cfg;		struct acpi_table_mcfg_config *cfg;

			if (seg == 0 && bus == 0 &&
			test_bit(PCI_SLOT(devfn), fallback_slots))
			return 0;

	while (1) {		while (1) {
	++cfg_num;		++cfg_num;
	if (cfg_num >= pci_mmcfg_config_num) {		if (cfg_num >= pci_mmcfg_config_num) {
	/* something bad is going on, no cfg table is found. */		/* Not found - fallback to type 1 */
	/* so we fall back to the old way we used to do this */		return 0;
	/* and just rely on the first entry to be correct. */
	return pci_mmcfg_config[0].base_address;
	}		}
	cfg = &pci_mmcfg_config[cfg_num];		cfg = &pci_mmcfg_config[cfg_num];
	if (cfg->pci_segment_group_number != seg)		if (cfg->pci_segment_group_number != seg)
	@@ -44,9 +48,9 @@ static u32 get_base_addr(unsigned int seg, int bus)
	}		}
	}		}

	static inline void pci_exp_set_dev_base(unsigned int seg, int bus, int devfn)		static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
	{		{
	u32 dev_base = get_base_addr(seg, bus) \| (bus << 20) \| (devfn << 12);		u32 dev_base = base \| (bus << 20) \| (devfn << 12);
	if (dev_base != mmcfg_last_accessed_device) {		if (dev_base != mmcfg_last_accessed_device) {
	mmcfg_last_accessed_device = dev_base;		mmcfg_last_accessed_device = dev_base;
	set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);		set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
	@@ -57,13 +61,18 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
	unsigned int devfn, int reg, int len, u32 *value)		unsigned int devfn, int reg, int len, u32 *value)
	{		{
	unsigned long flags;		unsigned long flags;
			u32 base;

	if (!value \|\| (bus > 255) \|\| (devfn > 255) \|\| (reg > 4095))		if (!value \|\| (bus > 255) \|\| (devfn > 255) \|\| (reg > 4095))
	return -EINVAL;		return -EINVAL;

			base = get_base_addr(seg, bus, devfn);
			if (!base)
			return pci_conf1_read(seg,bus,devfn,reg,len,value);

	spin_lock_irqsave(&pci_config_lock, flags);		spin_lock_irqsave(&pci_config_lock, flags);

	pci_exp_set_dev_base(seg, bus, devfn);		pci_exp_set_dev_base(base, bus, devfn);

	switch (len) {		switch (len) {
	case 1:		case 1:
	@@ -86,13 +95,18 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
	unsigned int devfn, int reg, int len, u32 value)		unsigned int devfn, int reg, int len, u32 value)
	{		{
	unsigned long flags;		unsigned long flags;
			u32 base;

	if ((bus > 255) \|\| (devfn > 255) \|\| (reg > 4095))		if ((bus > 255) \|\| (devfn > 255) \|\| (reg > 4095))
	return -EINVAL;		return -EINVAL;

			base = get_base_addr(seg, bus, devfn);
			if (!base)
			return pci_conf1_write(seg,bus,devfn,reg,len,value);

	spin_lock_irqsave(&pci_config_lock, flags);		spin_lock_irqsave(&pci_config_lock, flags);

	pci_exp_set_dev_base(seg, bus, devfn);		pci_exp_set_dev_base(base, bus, devfn);

	switch (len) {		switch (len) {
	case 1:		case 1:
	@@ -116,6 +130,37 @@ static struct pci_raw_ops pci_mmcfg = {
	.write = pci_mmcfg_write,		.write = pci_mmcfg_write,
	};		};

			/* K8 systems have some devices (typically in the builtin northbridge)
			that are only accessible using type1
			Normally this can be expressed in the MCFG by not listing them
			and assigning suitable _SEGs, but this isn't implemented in some BIOS.
			Instead try to discover all devices on bus 0 that are unreachable using MM
			and fallback for them.
			We only do this for bus 0/seg 0 */
			static __init void unreachable_devices(void)
			{
			int i;
			unsigned long flags;

			for (i = 0; i < 32; i++) {
			u32 val1;
			u32 addr;

			pci_conf1_read(0, 0, PCI_DEVFN(i, 0), 0, 4, &val1);
			if (val1 == 0xffffffff)
			continue;

			/* Locking probably not needed, but safer */
			spin_lock_irqsave(&pci_config_lock, flags);
			addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
			if (addr != 0)
			pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
			if (addr == 0 \|\| readl((u32 *)addr) != val1)
			set_bit(i, fallback_slots);
			spin_unlock_irqrestore(&pci_config_lock, flags);
			}
			}

	static int __init pci_mmcfg_init(void)		static int __init pci_mmcfg_init(void)
	{		{
	if ((pci_probe & PCI_PROBE_MMCONF) == 0)		if ((pci_probe & PCI_PROBE_MMCONF) == 0)
	@@ -131,6 +176,8 @@ static int __init pci_mmcfg_init(void)
	raw_pci_ops = &pci_mmcfg;		raw_pci_ops = &pci_mmcfg;
	pci_probe = (pci_probe & ~PCI_PROBE_MASK) \| PCI_PROBE_MMCONF;		pci_probe = (pci_probe & ~PCI_PROBE_MASK) \| PCI_PROBE_MMCONF;

			unreachable_devices();

	out:		out:
	return 0;		return 0;
	}		}

arch/i386/pci/pci.h

+7 −0

Original line number	Original line	Diff line number	Diff line
	@@ -74,3 +74,10 @@ extern spinlock_t pci_config_lock;

	extern int (pcibios_enable_irq)(struct pci_dev dev);		extern int (pcibios_enable_irq)(struct pci_dev dev);
	extern void (pcibios_disable_irq)(struct pci_dev dev);		extern void (pcibios_disable_irq)(struct pci_dev dev);

			extern int pci_conf1_write(unsigned int seg, unsigned int bus,
			unsigned int devfn, int reg, int len, u32 value);
			extern int pci_conf1_read(unsigned int seg, unsigned int bus,
			unsigned int devfn, int reg, int len, u32 *value);