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Commit d1b9f814 authored by Christophe Leroy's avatar Christophe Leroy Committed by Scott Wood
Browse files

powerpc/8xx: use r3 to scratch CR in ITLBmiss

parent 5dc6f3fe
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+9 −12
Original line number Diff line number Diff line
@@ -321,7 +321,7 @@ SystemCall:
#endif

InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
	mtspr	SPRN_SPRG_SCRATCH2, r3
#endif
	EXCEPTION_PROLOG_0
@@ -329,23 +329,20 @@ InstructionTLBMiss:
	/* If we are faulting a kernel address, we have to use the
	 * kernel page tables.
	 */
	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */
	INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
	/* Only modules will cause ITLB Misses as we always
	 * pin the first 8MB of kernel memory */
	mfspr	r11, SPRN_SRR0	/* Get effective address of fault */
	INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)
	mfcr	r10
	IS_KERNEL(r11, r11)
	mfcr	r3
	IS_KERNEL(r11, r10)
#endif
	mfspr	r11, SPRN_M_TW	/* Get level 1 table */
#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
	BRANCH_UNLESS_KERNEL(3f)
	lis	r11, (swapper_pg_dir-PAGE_OFFSET)@ha
3:
	mtcr	r10
	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */
#else
	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */
	INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
	mfspr	r11, SPRN_M_TW	/* Get level 1 table base address */
	mtcr	r3
#endif
	/* Insert level 1 index */
	rlwimi	r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
@@ -377,7 +374,7 @@ InstructionTLBMiss:
	MTSPR_CPU6(SPRN_MI_RPN, r10, r3)	/* Update TLB entry */

	/* Restore registers */
#ifdef CONFIG_8xx_CPU6
#if defined(CONFIG_8xx_CPU6) || defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
	mfspr	r3, SPRN_SPRG_SCRATCH2
#endif
	EXCEPTION_EPILOG_0