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Commit d1aad4d8 authored by Xiangliang Yu's avatar Xiangliang Yu Committed by Alex Deucher
Browse files

drm/amdgpu/virt: fix typo 



When send messages to hypervior, the messages format should be is
idh_request, not idh_event.

Signed-off-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarMonk Liu <Monk.Liu@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 59a82d7d

drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c

+8 −8
Original line number Diff line number Diff line
@@ -350,13 +350,13 @@ static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, bool val) 
}



static void xgpu_vi_mailbox_trans_msg(struct amdgpu_device *adev,

				      enum idh_event event)

				      enum idh_request req)

{

	u32 reg;



	reg = RREG32_NO_KIQ(mmMAILBOX_MSGBUF_TRN_DW0);

	reg = REG_SET_FIELD(reg, MAILBOX_MSGBUF_TRN_DW0,

			    MSGBUF_DATA, event);

			    MSGBUF_DATA, req);

	WREG32_NO_KIQ(mmMAILBOX_MSGBUF_TRN_DW0, reg);



	xgpu_vi_mailbox_set_valid(adev, true);
@@ -458,20 +458,20 @@ static int xgpu_vi_request_reset(struct amdgpu_device *adev) 
static int xgpu_vi_request_full_gpu_access(struct amdgpu_device *adev,

					   bool init)

{

	enum idh_event event;

	enum idh_request req;



	event = init ? IDH_REQ_GPU_INIT_ACCESS : IDH_REQ_GPU_FINI_ACCESS;

	return xgpu_vi_send_access_requests(adev, event);

	req = init ? IDH_REQ_GPU_INIT_ACCESS : IDH_REQ_GPU_FINI_ACCESS;

	return xgpu_vi_send_access_requests(adev, req);

}



static int xgpu_vi_release_full_gpu_access(struct amdgpu_device *adev,

					   bool init)

{

	enum idh_event event;

	enum idh_request req;

	int r = 0;



	event = init ? IDH_REL_GPU_INIT_ACCESS : IDH_REL_GPU_FINI_ACCESS;

	r = xgpu_vi_send_access_requests(adev, event);

	req = init ? IDH_REL_GPU_INIT_ACCESS : IDH_REL_GPU_FINI_ACCESS;

	r = xgpu_vi_send_access_requests(adev, req);



	return r;

}