Merge "q6afe: Fix out of bound access of clkinfo_per_port" (d0f1d9b8) · Commits · e / devices / android_kernel_oneplus_sm7250

dsp/q6afe.c

+7 −8

Original line number	Diff line number	Diff line
		@@ -9131,7 +9131,7 @@ int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg)
		{
		int index = 0;
		int ret = 0;
		u16 idx = 0;
		int idx = 0;
		uint32_t build_major_version = 0;
		uint32_t build_minor_version = 0;
		uint32_t build_branch_version = 0;
		@@ -9165,12 +9165,9 @@ int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg)
		}
		idx = afe_get_port_idx(port_id);
		if (idx < 0) {
		pr_err("%s: cannot get clock id for port id 0x%x\n", __func__,
		pr_debug("%s: cannot get clock id for port id 0x%x\n", __func__,
		port_id);
		return -EINVAL;
		}

		if (clkinfo_per_port[idx].mclk_src_id != MCLK_SRC_INT) {
		} else if (clkinfo_per_port[idx].mclk_src_id != MCLK_SRC_INT) {
		pr_debug("%s: ext MCLK src %d\n",
		__func__, clkinfo_per_port[idx].mclk_src_id);

		@@ -9200,10 +9197,12 @@ int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg)

		ret = afe_set_lpass_clk_cfg_ext_mclk(index, cfg,
		clkinfo_per_port[idx].mclk_freq);
		} else {
		ret = afe_set_lpass_clk_cfg(index, cfg);
		goto done;
		}

		ret = afe_set_lpass_clk_cfg(index, cfg);

		done:
		if (ret)
		pr_err("%s: afe_set_lpass_clk_cfg_v2 failed %d\n",
		__func__, ret);