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Commit d0856f3a authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amd/powerplay: fix populate dpm level failed when s3 on vega10. 



As the min clk may be  large than boot level can support.
in this case, just ignore the min clk.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b9509c80

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

+6 −7
Original line number Diff line number Diff line
@@ -3119,11 +3119,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, 
	vega10_ps->performance_levels[0].gfx_clock = sclk;

	vega10_ps->performance_levels[0].mem_clock = mclk;



	vega10_ps->performance_levels[1].gfx_clock =

		(vega10_ps->performance_levels[1].gfx_clock >=

				vega10_ps->performance_levels[0].gfx_clock) ?

						vega10_ps->performance_levels[1].gfx_clock :

						vega10_ps->performance_levels[0].gfx_clock;

	if (vega10_ps->performance_levels[1].gfx_clock <

			vega10_ps->performance_levels[0].gfx_clock)

		vega10_ps->performance_levels[0].gfx_clock =

				vega10_ps->performance_levels[1].gfx_clock;



	if (disable_mclk_switching) {

		/* Set Mclk the max of level 0 and level 1 */
@@ -3146,8 +3145,8 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, 
	} else {

		if (vega10_ps->performance_levels[1].mem_clock <

				vega10_ps->performance_levels[0].mem_clock)

			vega10_ps->performance_levels[1].mem_clock =

					vega10_ps->performance_levels[0].mem_clock;

			vega10_ps->performance_levels[0].mem_clock =

					vega10_ps->performance_levels[1].mem_clock;

	}



	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,