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Commit d02b0ffb authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'linux-4.13' of git://github.com/skeggsb/linux into drm-next 

- HDMI stereoscopic support
- Rework of display code to properly support SOR pad macro routing on
>=GM20x GPUs
- Various other fixes/improvements.

* 'linux-4.13' of git://github.com/skeggsb/linux: (73 commits)
  drm/nouveau/disp/nv50-: avoid creating ORs that aren't present on HW
  drm/nouveau: use proper prototype in nouveau_pmops_runtime() definition
  drm/nouveau: Skip vga_fini on non-PCI device
  drm/nouveau/tegra: Don't leave GPU in reset
  drm/nouveau/tegra: Skip manual unpowergating when not necessary
  drm/nouveau/hwmon: Change permissions to numeric
  drm/nouveau/hwmon: expose the auto_point and pwm_min/max attrs
  drm/nouveau/hwmon: Remove old code, add .write/.read operations
  drm/nouveau/hwmon: Add nouveau_hwmon_ops structure with .is_visible/.read_string
  drm/nouveau/hwmon: Add config for all sensors and their settings
  drm/nouveau/disp/gm200-: allow non-identity mapping of SOR <-> macro links
  drm/nouveau/disp/nv50-: implement a common supervisor 3.0
  drm/nouveau/disp/nv50-: implement a common supervisor 2.2
  drm/nouveau/disp/nv50-: implement a common supervisor 2.1
  drm/nouveau/disp/nv50-: implement a common supervisor 2.0
  drm/nouveau/disp/nv50-: implement a common supervisor 1.0
  drm/nouveau/disp/nv50-gt21x: remove workaround for dp->tmds hotplug issues
  drm/nouveau/disp/dp: use new devinit script interpreter entry-point
  drm/nouveau/disp/dp: determine link bandwidth requirements from head state
  drm/nouveau/disp: introduce acquire/release display path methods
  ...
parents 4a525bad 7df1bb87

drivers/gpu/drm/nouveau/dispnv04/disp.h

+4 −12
Original line number Diff line number Diff line
@@ -169,18 +169,10 @@ static inline void 
nouveau_bios_run_init_table(struct drm_device *dev, u16 table,

			    struct dcb_output *outp, int crtc)

{

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nvkm_bios *bios = nvxx_bios(&drm->client.device);

	struct nvbios_init init = {

		.subdev = &bios->subdev,

		.bios = bios,

		.offset = table,

		.outp = outp,

		.crtc = crtc,

		.execute = 1,

	};



	nvbios_exec(&init);

	nvbios_init(&nvxx_bios(&nouveau_drm(dev)->client.device)->subdev, table,

		init.outp = outp;

		init.head = crtc;

	);

}



#endif

drivers/gpu/drm/nouveau/include/nvif/cl5070.h

+9 −30
Original line number Diff line number Diff line
@@ -27,29 +27,25 @@ struct nv50_disp_scanoutpos_v0 { 


struct nv50_disp_mthd_v1 {

	__u8  version;

#define NV50_DISP_MTHD_V1_DAC_PWR                                          0x10

#define NV50_DISP_MTHD_V1_ACQUIRE                                          0x01

#define NV50_DISP_MTHD_V1_RELEASE                                          0x02

#define NV50_DISP_MTHD_V1_DAC_LOAD                                         0x11

#define NV50_DISP_MTHD_V1_SOR_PWR                                          0x20

#define NV50_DISP_MTHD_V1_SOR_HDA_ELD                                      0x21

#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR                                     0x22

#define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT                                  0x23

#define NV50_DISP_MTHD_V1_SOR_DP_PWR                                       0x24

#define NV50_DISP_MTHD_V1_SOR_DP_MST_LINK                                  0x25

#define NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI                                  0x26

#define NV50_DISP_MTHD_V1_PIOR_PWR                                         0x30

	__u8  method;

	__u16 hasht;

	__u16 hashm;

	__u8  pad06[2];

};



struct nv50_disp_dac_pwr_v0 {

struct nv50_disp_acquire_v0 {

	__u8  version;

	__u8  state;

	__u8  data;

	__u8  vsync;

	__u8  hsync;

	__u8  pad05[3];

	__u8  or;

	__u8  link;

	__u8  pad03[5];

};



struct nv50_disp_dac_load_v0 {
@@ -59,12 +55,6 @@ struct nv50_disp_dac_load_v0 { 
	__u32 data;

};



struct nv50_disp_sor_pwr_v0 {

	__u8  version;

	__u8  state;

	__u8  pad02[6];

};



struct nv50_disp_sor_hda_eld_v0 {

	__u8  version;

	__u8  pad01[7];
@@ -76,7 +66,9 @@ struct nv50_disp_sor_hdmi_pwr_v0 { 
	__u8  state;

	__u8  max_ac_packet;

	__u8  rekey;

	__u8  pad04[4];

	__u8  avi_infoframe_length;

	__u8  vendor_infoframe_length;

	__u8  pad06[2];

};



struct nv50_disp_sor_lvds_script_v0 {
@@ -86,12 +78,6 @@ struct nv50_disp_sor_lvds_script_v0 { 
	__u8  pad04[4];

};



struct nv50_disp_sor_dp_pwr_v0 {

	__u8  version;

	__u8  state;

	__u8  pad02[6];

};



struct nv50_disp_sor_dp_mst_link_v0 {

	__u8  version;

	__u8  state;
@@ -106,11 +92,4 @@ struct nv50_disp_sor_dp_mst_vcpi_v0 { 
	__u16 pbn;

	__u16 aligned_pbn;

};



struct nv50_disp_pior_pwr_v0 {

	__u8  version;

	__u8  state;

	__u8  type;

	__u8  pad03[5];

};

#endif

drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h

+5 −5
Original line number Diff line number Diff line
@@ -8,17 +8,15 @@ struct nvkm_disp { 
	const struct nvkm_disp_func *func;

	struct nvkm_engine engine;



	struct nvkm_oproxy *client;



	struct list_head head;

	struct list_head ior;

	struct list_head outp;

	struct list_head conn;



	struct nvkm_event hpd;

	struct nvkm_event vblank;



	struct {

		int nr;

	} head;

	struct nvkm_oproxy *client;

};



int nv04_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
@@ -26,7 +24,9 @@ int nv50_disp_new(struct nvkm_device *, int, struct nvkm_disp **); 
int g84_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int gt200_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int g94_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int mcp77_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int gt215_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int mcp89_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int gf119_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int gk104_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

int gk110_disp_new(struct nvkm_device *, int, struct nvkm_disp **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/init.h

+21 −6
Original line number Diff line number Diff line
@@ -3,19 +3,34 @@ 


struct nvbios_init {

	struct nvkm_subdev *subdev;

	struct nvkm_bios *bios;

	u16 offset;

	u32 offset;



	struct dcb_output *outp;

	int crtc;

	int or;

	int link;

	int head;



	/* internal state used during parsing */

	u8 execute;

	u32 nested;

	u16 repeat;

	u16 repend;

	u32 repeat;

	u32 repend;

	u32 ramcfg;

};



#define nvbios_init(s,o,ARGS...) ({                                            \

	struct nvbios_init init = {                                            \

		.subdev = (s),                                                 \

		.offset = (o),                                                 \

		.or = -1,                                                      \

		.link = 0,                                                     \

		.head = -1,                                                    \

		.execute = 1,                                                  \

	};                                                                     \

	ARGS                                                                   \

	nvbios_exec(&init);                                                    \

})

int nvbios_exec(struct nvbios_init *);

int nvbios_init(struct nvkm_subdev *, bool execute);



int nvbios_post(struct nvkm_subdev *, bool execute);

#endif

drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h

+0 −1
Original line number Diff line number Diff line
@@ -26,7 +26,6 @@ struct nvkm_timer { 


u64 nvkm_timer_read(struct nvkm_timer *);

void nvkm_timer_alarm(struct nvkm_timer *, u32 nsec, struct nvkm_alarm *);

void nvkm_timer_alarm_cancel(struct nvkm_timer *, struct nvkm_alarm *);



/* Delay based on GPU time (ie. PTIMER).

 *