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Commit cfac7d6a authored by Mike Rapoport's avatar Mike Rapoport Committed by Greg Kroah-Hartman
Browse files

staging: sm750fb: remove '#if 1' conditionals



The code enclosed in '#if 1' anyway gets compiled. Removing useless
conditionals.

Signed-off-by: default avatarMike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f741554e
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+5 −8
Original line number Diff line number Diff line
@@ -60,11 +60,10 @@ static void setChipClock(unsigned int frequency)
{
	pll_value_t pll;
	unsigned int ulActualMxClk;
#if 1

	/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
	if (getChipType() == SM750LE)
		return;
#endif

	if (frequency) {
		/*
@@ -88,11 +87,11 @@ static void setChipClock(unsigned int frequency)
static void setMemoryClock(unsigned int frequency)
{
	unsigned int ulReg, divisor;
 #if 1

	/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
	if (getChipType() == SM750LE)
		return;
#endif

	if (frequency) {
		/* Set the frequency to the maximum frequency that the DDR Memory can take
		which is 336MHz. */
@@ -135,11 +134,11 @@ static void setMemoryClock(unsigned int frequency)
static void setMasterClock(unsigned int frequency)
{
	unsigned int ulReg, divisor;
#if 1

	/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
	if (getChipType() == SM750LE)
		return;
#endif

	if (frequency) {
		/* Set the frequency to the maximum frequency that the SM750 engine can
		run, which is about 190 MHz. */
@@ -332,13 +331,11 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
	unsigned int tmpClock, ret;
	pllcalparam *xparm;

#if 1
	if (getChipType() == SM750LE) {
		/* SM750LE don't have prgrammable PLL and M/N values to work on.
		Just return the requested clock. */
		return request_orig;
	}
#endif

	ret = 0;
	mini_diff = ~0;
+1 −2
Original line number Diff line number Diff line
@@ -168,14 +168,13 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
		*/

		POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
#if 1

		while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) {
			cnt++;
			if (cnt > 1000)
				break;
			POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
		}
#endif
	} else {
		ret = -1;
	}
+1 −2
Original line number Diff line number Diff line
@@ -276,7 +276,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
	ret = 0;
	par = container_of(crtc, struct lynxfb_par, crtc);
	share = par->share;
#if 1

	if (!share->accel_off) {
		/* set 2d engine pixel format according to mode bpp */
		switch (var->bits_per_pixel) {
@@ -293,7 +293,6 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
		}
		hw_set2dformat(&share->accel, fmt);
	}
#endif

	/* set timing */
	modparm.pixel_clock = ps_to_hz(var->pixclock);