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Commit cf633464 authored by Mark Zhang's avatar Mark Zhang Committed by Stephen Warren
Browse files

ARM: dt: tegra: ventana: define pinmux for ddc 



Tegra 2's I2C2 controller can be routed to either the PTA
or DDC pin group on Ventana. So:
- Remove the HDMI function definition of pta pingroup
- Define child i2c adapters(ddc & pta) for I2C2 controller

Signed-off-by: default avatarMark Zhang <markz@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 6fb11131

arch/arm/boot/dts/tegra20-ventana.dts

+63 −6
Original line number Original line Diff line number Diff line
@@ -64,11 +64,6 @@ 
				nvidia,pins = "dap4";

				nvidia,pins = "dap4";

				nvidia,function = "dap4";

				nvidia,function = "dap4";

			};

			};

			ddc {

				nvidia,pins = "ddc", "owc", "spdi", "spdo",

					"uac";

				nvidia,function = "rsvd2";

			};

			dta {

			dta {

				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";

				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";

				nvidia,function = "vi";

				nvidia,function = "vi";
@@ -98,7 +93,7 @@ 
				nvidia,function = "pcie";

				nvidia,function = "pcie";

			};

			};

			hdint {

			hdint {

				nvidia,pins = "hdint", "pta";

				nvidia,pins = "hdint";

				nvidia,function = "hdmi";

				nvidia,function = "hdmi";

			};

			};

			i2cp {

			i2cp {
@@ -129,6 +124,10 @@ 
					"lspi", "lvp1", "lvs";

					"lspi", "lvp1", "lvs";

				nvidia,function = "displaya";

				nvidia,function = "displaya";

			};

			};

			owc {

				nvidia,pins = "owc", "spdi", "spdo", "uac";

				nvidia,function = "rsvd2";

			};

			pmc {

			pmc {

				nvidia,pins = "pmc";

				nvidia,pins = "pmc";

				nvidia,function = "pwr_on";

				nvidia,function = "pwr_on";
@@ -248,6 +247,39 @@ 
				nvidia,slew-rate-falling = <3>;

				nvidia,slew-rate-falling = <3>;

			};

			};

		};

		};



		state_i2cmux_ddc: pinmux_i2cmux_ddc {

			ddc {

				nvidia,pins = "ddc";

				nvidia,function = "i2c2";

			};

			pta {

				nvidia,pins = "pta";

				nvidia,function = "rsvd4";

			};

		};



		state_i2cmux_pta: pinmux_i2cmux_pta {

			ddc {

				nvidia,pins = "ddc";

				nvidia,function = "rsvd4";

			};

			pta {

				nvidia,pins = "pta";

				nvidia,function = "i2c2";

			};

		};



		state_i2cmux_idle: pinmux_i2cmux_idle {

			ddc {

				nvidia,pins = "ddc";

				nvidia,function = "rsvd4";

			};

			pta {

				nvidia,pins = "pta";

				nvidia,function = "rsvd4";

			};

		};

	};

	};





	i2s@70002800 {

	i2s@70002800 {
@@ -291,6 +323,31 @@ 
		clock-frequency = <400000>;

		clock-frequency = <400000>;

	};

	};





	i2cmux {

		compatible = "i2c-mux-pinctrl";

		#address-cells = <1>;

		#size-cells = <0>;



		i2c-parent = <&{/i2c@7000c400}>;



		pinctrl-names = "ddc", "pta", "idle";

		pinctrl-0 = <&state_i2cmux_ddc>;

		pinctrl-1 = <&state_i2cmux_pta>;

		pinctrl-2 = <&state_i2cmux_idle>;



		i2c@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		i2c@1 {

			reg = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

		};

	};



	i2c@7000c500 {

	i2c@7000c500 {

		status = "okay";

		status = "okay";

		clock-frequency = <400000>;

		clock-frequency = <400000>;