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Commit cee1a799 authored by Axel Lin's avatar Axel Lin Committed by Mark Brown
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regulator: Only update [LDOx|DCx]_HIB_MODE bits in wm8350_[ldo|dcdc]_set_suspend_disable 



What we want is to disable output by setting [LDOx|DCx]_HIB_MODE bits.
Current code also clears other bits in LDOx/DCDCx Low Power register.

R202 (CAh) LDO1 Low Power
BIT[13:12] LDO1 Hibernate behaviour:
00 = Select voltage image settings
01 = disable output
10 = reserved
11 = reserved

R182 (B6h) DCDC1 Low Power
BIT[14:12] DC-DC1 Hibernate behaviour:
000 = Use current settings (no change)
001 = Select voltage image settings
010 = Force standby mode
011 = Force standby mode and voltage image settings.
100 = Force LDO mode
101 = Force LDO mode and voltage image settings.
110 = Reserved.
111 = Disable output

Signed-off-by: default avatarAxel Lin <axel.lin@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent e841a36a

drivers/regulator/wm8350-regulator.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -535,25 +535,25 @@ static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev) 
		val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);

		val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);

		wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,

		wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,

			WM8350_DCDC_HIB_MODE_DIS);

				 val | WM8350_DCDC_HIB_MODE_DIS);

		break;

		break;

	case WM8350_DCDC_3:

	case WM8350_DCDC_3:

		val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);

		val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);

		wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,

		wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,

			WM8350_DCDC_HIB_MODE_DIS);

				 val | WM8350_DCDC_HIB_MODE_DIS);

		break;

		break;

	case WM8350_DCDC_4:

	case WM8350_DCDC_4:

		val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);

		val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);

		wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,

		wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,

			WM8350_DCDC_HIB_MODE_DIS);

				 val | WM8350_DCDC_HIB_MODE_DIS);

		break;

		break;

	case WM8350_DCDC_6:

	case WM8350_DCDC_6:

		val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);

		val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);

		wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;

		wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,

		wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,

			WM8350_DCDC_HIB_MODE_DIS);

				 val | WM8350_DCDC_HIB_MODE_DIS);

		break;

		break;

	case WM8350_DCDC_2:

	case WM8350_DCDC_2:

	case WM8350_DCDC_5:

	case WM8350_DCDC_5:
@@ -749,7 +749,7 @@ static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev) 




	/* all LDOs have same mV bits */

	/* all LDOs have same mV bits */

	val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;

	val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;

	wm8350_reg_write(wm8350, volt_reg, WM8350_LDO1_HIB_MODE_DIS);

	wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS);

	return 0;

	return 0;

}

}