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Commit ce599360 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "power: qpnp-qg: Battery-temp based ESR enable"

parents b2c89eef e9fa56c1

drivers/power/supply/qcom/qg-core.h

+1 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ struct qg_dt { 
	int			sys_min_volt_mv;

	int			fvss_vbat_mv;

	int			tcss_entry_soc;

	int			esr_low_temp_threshold;

	bool			hold_soc_while_full;

	bool			linearize_soc;

	bool			cl_disable;

drivers/power/supply/qcom/qpnp-qg.c

+20 −1
Original line number Diff line number Diff line
@@ -1020,7 +1020,7 @@ static int qg_process_esr_data(struct qpnp_qg *chip) 


static int qg_esr_estimate(struct qpnp_qg *chip)

{

	int rc, i, ibat = 0;

	int rc, i, ibat = 0, temp = 0;

	u8 esr_done_count, reg0 = 0, reg1 = 0;

	bool is_charging = false;
@@ -1046,6 +1046,17 @@ static int qg_esr_estimate(struct qpnp_qg *chip) 
			!chip->dt.esr_discharge_enable)

		return 0;



	/* Ignore ESR if battery-temp is below a threshold */

	rc = qg_get_battery_temp(chip, &temp);

	if (rc < 0)

		return rc;

	if (temp < chip->dt.esr_low_temp_threshold) {

		qg_dbg(chip, QG_DEBUG_ESR,

			"Battery temperature(%d) below threshold(%d) for ESR\n",

				temp, chip->dt.esr_low_temp_threshold);

		return 0;

	}



	if (chip->batt_soc != INT_MIN && (chip->batt_soc <

					chip->dt.esr_disable_soc)) {

		qg_dbg(chip, QG_DEBUG_ESR,
@@ -4127,6 +4138,7 @@ static int qg_parse_cl_dt(struct qpnp_qg *chip) 
#define DEFAULT_SYS_MIN_VOLT_MV		2800

#define DEFAULT_FVSS_VBAT_MV		3500

#define DEFAULT_TCSS_ENTRY_SOC		90

#define DEFAULT_ESR_LOW_TEMP_THRESHOLD	100 /* 10 deg */

static int qg_parse_dt(struct qpnp_qg *chip)

{

	int rc = 0;
@@ -4336,6 +4348,13 @@ static int qg_parse_dt(struct qpnp_qg *chip) 
	else

		chip->dt.esr_min_ibat_ua = (int)temp;



	rc = of_property_read_u32(node, "qcom,esr-low-temp-threshold", &temp);

	if (rc < 0)

		chip->dt.esr_low_temp_threshold =

					DEFAULT_ESR_LOW_TEMP_THRESHOLD;

	else

		chip->dt.esr_low_temp_threshold = (int)temp;



	rc = of_property_read_u32(node, "qcom,shutdown_soc_threshold", &temp);

	if (rc < 0)

		chip->dt.shutdown_soc_threshold = -EINVAL;