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Commit cda1ade6 authored by Thor Thayer's avatar Thor Thayer Committed by Dinh Nguyen
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ARM: dts: Add EMAC AXI settings for Arria10



Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.

Signed-off-by: default avatarThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 59d94d2e
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+9 −0
Original line number Diff line number Diff line
@@ -408,6 +408,12 @@
				};
		};

		socfpga_axi_setup: stmmac-axi-config {
			snps,wr_osr_lmt = <0xf>;
			snps,rd_osr_lmt = <0xf>;
			snps,blen = <0 0 0 0 16 0 0>;
		};

		gmac0: ethernet@ff800000 {
			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
@@ -424,6 +430,7 @@
			clock-names = "stmmaceth";
			resets = <&rst EMAC0_RESET>;
			reset-names = "stmmaceth";
			snps,axi-config = <&socfpga_axi_setup>;
			status = "disabled";
		};

@@ -443,6 +450,7 @@
			clock-names = "stmmaceth";
			resets = <&rst EMAC1_RESET>;
			reset-names = "stmmaceth";
			snps,axi-config = <&socfpga_axi_setup>;
			status = "disabled";
		};

@@ -460,6 +468,7 @@
			rx-fifo-depth = <16384>;
			clocks = <&l4_mp_clk>;
			clock-names = "stmmaceth";
			snps,axi-config = <&socfpga_axi_setup>;
			status = "disabled";
		};