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Commit cd79a94b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add GCC clock node for LITO"

parents 5a174635 09ff0244

arch/arm64/boot/dts/qcom/lito-gdsc.dtsi

+6 −6
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 */



&soc {

	/* GCC GDSCs */

	ufs_phy_gdsc: qcom,gdsc@177004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x177004 0x4>;

		regulator-name = "ufs_phy_gdsc";

	};



	usb30_prim_gdsc: qcom,gdsc@10f004 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x10f004 0x4>;

		regulator-name = "usb30_prim_gdsc";

	};



	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d050 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x17d050 0x4>;

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";

		qcom,no-status-check-on-disable;
@@ -26,7 +26,7 @@ 
	};



	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d058 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x17d058 0x4>;

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";

		qcom,no-status-check-on-disable;
@@ -34,7 +34,7 @@ 
	};



	hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc: qcom,gdsc@17d054 {

		compatible = "regulator-fixed";

		compatible = "qcom,gdsc";

		reg = <0x17d054 0x4>;

		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc";

		qcom,no-status-check-on-disable;

arch/arm64/boot/dts/qcom/lito.dtsi

+16 −4
Original line number Diff line number Diff line
@@ -806,15 +806,16 @@ 
	clocks {

		xo_board: xo-board {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <38400000>;

			clock-output-names = "xo_board";

			#clock-cells = <0>;

		};



		sleep_clk: sleep-clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-output-names = "chip_sleep_clk";

			clock-frequency = <32764>;

			#clock-cells = <0>;

		};

	};
@@ -826,6 +827,14 @@ 
		#clock-cells = <0>;

	};



	cxo_a: bi_tcxo_ao {

		compatible = "fixed-factor-clock";

		clocks = <&xo_board>;

		clock-mult = <1>;

		clock-div = <2>;

		#clock-cells = <0>;

	};



	rpmhcc: qcom,rpmhclk {

		compatible = "qcom,dummycc";

		clock-output-names = "rpmh_clocks";
@@ -839,8 +848,11 @@ 
	};



	gcc: qcom,gcc {

		compatible = "qcom,dummycc";

		clock-output-names = "gcc_clocks";

		compatible = "qcom,gcc-lito", "syscon";

		reg = <0x100000 0x1f0000>;

		reg-names = "cc_base";

		vdd_cx-supply = <&VDD_CX_LEVEL>;

		vdd_cx_ao-supply = <&VDD_CX_LEVEL_AO>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

arch/arm64/configs/vendor/lito_defconfig

+3 −0
Original line number Diff line number Diff line
@@ -349,6 +349,9 @@ CONFIG_UIO_MSM_SHAREDMEM=y 
CONFIG_STAGING=y

CONFIG_ASHMEM=y

CONFIG_ION=y

# CONFIG_QCOM_A53PLL is not set

CONFIG_QCOM_CLK_RPMH=y

CONFIG_SM_GCC_LITO=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

drivers/clk/qcom/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -347,3 +347,13 @@ config MSM_NPUCC_KONA 
	  KONA devices.

	  Say Y if you want to enable use of the Network Processing Unit in

	  order to speed up certain types of calculations.



config SM_GCC_LITO

	tristate "LITO Global Clock Controller"

	depends on COMMON_CLK_QCOM

	select QCOM_GDSC

	help

	  Support for the global clock controller on Qualcomm Technologies, Inc

	  LITO devices.

	  Say Y if you want to use peripheral devices such as UART, SPI, I2C,

	  USB, UFS, SD/eMMC, PCIe, etc.

drivers/clk/qcom/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o 
obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o

obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o

obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o

obj-$(CONFIG_SM_GCC_LITO) += gcc-lito.o

obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o



obj-y += mdss/