Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ccc9d4a6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull crypto update from Herbert Xu:
 "API:

   - Add support for cipher output IVs in testmgr
   - Add missing crypto_ahash_blocksize helper
   - Mark authenc and des ciphers as not allowed under FIPS.

Algorithms:

   - Add CRC support to 842 compression
   - Add keywrap algorithm
   - A number of changes to the akcipher interface:
      + Separate functions for setting public/private keys.
      + Use SG lists.

Drivers:

   - Add Intel SHA Extension optimised SHA1 and SHA256
   - Use dma_map_sg instead of custom functions in crypto drivers
   - Add support for STM32 RNG
   - Add support for ST RNG
   - Add Device Tree support to exynos RNG driver
   - Add support for mxs-dcp crypto device on MX6SL
   - Add xts(aes) support to caam
   - Add ctr(aes) and xts(aes) support to qat
   - A large set of fixes from Russell King for the marvell/cesa driver"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (115 commits)
  crypto: asymmetric_keys - Fix unaligned access in x509_get_sig_params()
  crypto: akcipher - Don't #include crypto/public_key.h as the contents aren't used
  hwrng: exynos - Add Device Tree support
  hwrng: exynos - Fix missing configuration after suspend to RAM
  hwrng: exynos - Add timeout for waiting on init done
  dt-bindings: rng: Describe Exynos4 PRNG bindings
  crypto: marvell/cesa - use __le32 for hardware descriptors
  crypto: marvell/cesa - fix missing cpu_to_le32() in mv_cesa_dma_add_op()
  crypto: marvell/cesa - use memcpy_fromio()/memcpy_toio()
  crypto: marvell/cesa - use gfp_t for gfp flags
  crypto: marvell/cesa - use dma_addr_t for cur_dma
  crypto: marvell/cesa - use readl_relaxed()/writel_relaxed()
  crypto: caam - fix indentation of close braces
  crypto: caam - only export the state we really need to export
  crypto: caam - fix non-block aligned hash calculation
  crypto: caam - avoid needlessly saving and restoring caam_hash_ctx
  crypto: caam - print errno code when hash registration fails
  crypto: marvell/cesa - fix memory leak
  crypto: marvell/cesa - fix first-fragment handling in mv_cesa_ahash_dma_last_req()
  crypto: marvell/cesa - rearrange handling for sw padded hashes
  ...
parents 66ef3493 271817a3
Loading
Loading
Loading
Loading
+17 −0
Original line number Diff line number Diff line
Exynos Pseudo Random Number Generator

Required properties:

- compatible  : Should be "samsung,exynos4-rng".
- reg         : Specifies base physical address and size of the registers map.
- clocks      : Phandle to clock-controller plus clock-specifier pair.
- clock-names : "secss" as a clock name.

Example:

	rng@10830400 {
		compatible = "samsung,exynos4-rng";
		reg = <0x10830400 0x200>;
		clocks = <&clock CLK_SSS>;
		clock-names = "secss";
	};
+15 −0
Original line number Diff line number Diff line
STMicroelectronics HW Random Number Generator
----------------------------------------------

Required parameters:
compatible	: Should be "st,rng"
reg		: Base address and size of IP's register map.
clocks		: Phandle to device's clock (See: ../clocks/clock-bindings.txt)

Example:

rng@fee80000 {
	compatible      = "st,rng";
	reg		= <0xfee80000 0x1000>;
	clocks          = <&clk_sysin>;
}
+21 −0
Original line number Diff line number Diff line
STMicroelectronics STM32 HW RNG
===============================

The STM32 hardware random number generator is a simple fixed purpose IP and
is fully separated from other crypto functions.

Required properties:

- compatible : Should be "st,stm32-rng"
- reg : Should be register base and length as documented in the datasheet
- interrupts : The designated IRQ line for the RNG
- clocks : The clock needed to enable the RNG

Example:

	rng: rng@50060800 {
		compatible = "st,stm32-rng";
		reg = <0x50060800 0x400>;
		interrupts = <80>;
		clocks = <&rcc 0 38>;
	};
+4 −4
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ Introduction:
	The hw_random framework is software that makes use of a
	special hardware feature on your CPU or motherboard,
	a Random Number Generator (RNG).  The software has two parts:
	a core providing the /dev/hw_random character device and its
	a core providing the /dev/hwrng character device and its
	sysfs support, plus a hardware-specific driver that plugs
	into that core.

@@ -14,7 +14,7 @@ Introduction:

		http://sourceforge.net/projects/gkernel/

	Those tools use /dev/hw_random to fill the kernel entropy pool,
	Those tools use /dev/hwrng to fill the kernel entropy pool,
	which is used internally and exported by the /dev/urandom and
	/dev/random special files.

@@ -32,13 +32,13 @@ Theory of operation:
	The rng-tools package uses such tests in "rngd", and lets you
	run them by hand with a "rngtest" utility.

	/dev/hw_random is char device major 10, minor 183.
	/dev/hwrng is char device major 10, minor 183.

	CLASS DEVICE.  There is a /sys/class/misc/hw_random node with
	two unique attributes, "rng_available" and "rng_current".  The
	"rng_available" attribute lists the hardware-specific drivers
	available, while "rng_current" lists the one which is currently
	connected to /dev/hw_random.  If your system has more than one
	connected to /dev/hwrng.  If your system has more than one
	RNG available, you may change the one used by writing a name from
	the list in "rng_available" into "rng_current".

+8 −0
Original line number Diff line number Diff line
@@ -1529,6 +1529,7 @@ W: http://www.stlinux.com
S:	Maintained
F:	arch/arm/mach-sti/
F:	arch/arm/boot/dts/sti*
F:	drivers/char/hw_random/st-rng.c
F:	drivers/clocksource/arm_global_timer.c
F:	drivers/clocksource/clksrc_st_lpc.c
F:	drivers/i2c/busses/i2c-st.c
@@ -6587,6 +6588,13 @@ M: Guenter Roeck <linux@roeck-us.net>
S:	Maintained
F:	drivers/net/dsa/mv88e6352.c

MARVELL CRYPTO DRIVER
M:	Boris Brezillon <boris.brezillon@free-electrons.com>
M:	Arnaud Ebalard <arno@natisbad.org>
F:	drivers/crypto/marvell/
S:	Maintained
L:	linux-crypto@vger.kernel.org

MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
M:	Mirko Lindner <mlindner@marvell.com>
M:	Stephen Hemminger <stephen@networkplumber.org>
Loading