Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ccb7d349 authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: vdd-level: Update the vdd level for CX on Khaje



Vdd level vote to be moved to TURBO_L2, thus update the vdd level.

Change-Id: I2849e377853d8b9565dea8209aba410ca6bb3280
Signed-off-by: default avatarTaniya Das <quic_tdas@quicinc.com>
parent 765be395
Loading
Loading
Loading
Loading
+13 −13
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@
#define CX_GMU_CBCR_WAKE_MASK		0xf
#define CX_GMU_CBCR_WAKE_SHIFT		8

static DEFINE_VDD_REGULATORS(vdd_cx, VDD_HIGH_L2 + 1, 1, vdd_corner);
static DEFINE_VDD_REGULATORS(vdd_cx, VDD_L2_HIGH_L2 + 1, 1, vdd_l2_corner);
static DEFINE_VDD_REGULATORS(vdd_mx, VDD_HIGH_L1 + 1, 1, vdd_corner);

enum {
@@ -190,9 +190,9 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = {
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_rcg2_ops,
		.vdd_class = &vdd_cx,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
			[VDD_LOWER] = 200000000},
		.num_rate_max = VDD_L2_NUM,
		.rate_max = (unsigned long[VDD_L2_NUM]) {
			[VDD_L2_LOWER] = 200000000},
	},
};

@@ -223,15 +223,15 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src = {
		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
		.ops = &clk_rcg2_ops,
		.vdd_class = &vdd_cx,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
			[VDD_LOWER] = 320000097,
			[VDD_LOW] = 465000000,
			[VDD_LOW_L1] = 600000000,
			[VDD_NOMINAL] = 785088000,
			[VDD_HIGH] = 1025088000,
			[VDD_HIGH_L1] = 1114800000,
			[VDD_HIGH_L2] = 1260000000},
		.num_rate_max = VDD_L2_NUM,
		.rate_max = (unsigned long[VDD_L2_NUM]) {
			[VDD_L2_LOWER] = 320000097,
			[VDD_L2_LOW] = 465000000,
			[VDD_L2_LOW_L1] = 600000000,
			[VDD_L2_NOMINAL] = 785088000,
			[VDD_L2_HIGH] = 1025088000,
			[VDD_L2_HIGH_L1] = 1114800000,
			[VDD_L2_HIGH_L2] = 1260000000},
	},
};

+27 −2
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ enum vdd_levels {
	VDD_NOMINAL_L1,		/* NOM L1 */
	VDD_HIGH,		/* TURBO */
	VDD_HIGH_L1,		/* TURBO_L1 */
	VDD_HIGH_L2,		/* TURBO L2 */
	VDD_NUM,
};

@@ -34,7 +33,33 @@ static int vdd_corner[] = {
	[VDD_NOMINAL_L1] = RPM_SMD_REGULATOR_LEVEL_NOM_PLUS,
	[VDD_HIGH]    = RPM_SMD_REGULATOR_LEVEL_TURBO,
	[VDD_HIGH_L1]    = RPM_SMD_REGULATOR_LEVEL_TURBO_NO_CPR,
	[VDD_HIGH_L2]    = RPM_SMD_REGULATOR_LEVEL_SUPER_TURBO,
};

enum vdd_l2_levels {
	VDD_L2_NONE,
	VDD_L2_MIN,		/* MIN SVS */
	VDD_L2_LOWER,		/* SVS2 */
	VDD_L2_LOW,		/* SVS */
	VDD_L2_LOW_L1,		/* SVSL1 */
	VDD_L2_NOMINAL,		/* NOM */
	VDD_L2_NOMINAL_L1,		/* NOM L1 */
	VDD_L2_HIGH,		/* TURBO */
	VDD_L2_HIGH_L1,		/* TURBO_L1 */
	VDD_L2_HIGH_L2,		/* TURBO L2 */
	VDD_L2_NUM,
};

static int vdd_l2_corner[] = {
	[VDD_L2_NONE]    = 0,
	[VDD_L2_MIN]     = RPM_SMD_REGULATOR_LEVEL_MIN_SVS,
	[VDD_L2_LOWER]   = RPM_SMD_REGULATOR_LEVEL_LOW_SVS,
	[VDD_L2_LOW]     = RPM_SMD_REGULATOR_LEVEL_SVS,
	[VDD_L2_LOW_L1]  = RPM_SMD_REGULATOR_LEVEL_SVS_PLUS,
	[VDD_L2_NOMINAL] = RPM_SMD_REGULATOR_LEVEL_NOM,
	[VDD_L2_NOMINAL_L1] = RPM_SMD_REGULATOR_LEVEL_NOM_PLUS,
	[VDD_L2_HIGH]    = RPM_SMD_REGULATOR_LEVEL_TURBO,
	[VDD_L2_HIGH_L1]    = RPM_SMD_REGULATOR_LEVEL_TURBO_NO_CPR,
	[VDD_L2_HIGH_L2]    = RPM_SMD_REGULATOR_LEVEL_SUPER_TURBO,
};

#endif