Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cc391bbb authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: use cpu/pch transcoder on intel_enable_pipe 



This function runs on Haswell, so set the correct pch_transcoder and
cpu_transcoder variables. This fixes an assertion failure on Haswell
VGA.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d63fa0dc

drivers/gpu/drm/i915/intel_display.c

+8 −2
Original line number Diff line number Diff line
@@ -1812,9 +1812,15 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, 
{

	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,

								      pipe);

	enum transcoder pch_transcoder;

	int reg;

	u32 val;



	if (IS_HASWELL(dev_priv->dev))

		pch_transcoder = TRANSCODER_A;

	else

		pch_transcoder = pipe;



	/*

	 * A pipe without a PLL won't actually be able to drive bits from

	 * a plane.  On ILK+ the pipe PLLs are integrated, so we don't
@@ -1825,8 +1831,8 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, 
	else {

		if (pch_port) {

			/* if driving the PCH, we need FDI enabled */

			assert_fdi_rx_pll_enabled(dev_priv, pipe);

			assert_fdi_tx_pll_enabled(dev_priv, pipe);

			assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder);

			assert_fdi_tx_pll_enabled(dev_priv, cpu_transcoder);

		}

		/* FIXME: assert CPU port conditions for SNB+ */

	}