Loading drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c +11 −4 Original line number Diff line number Diff line Loading @@ -26,6 +26,8 @@ #include <nvif/unpack.h> #include <nvif/class.h> #include <subdev/timer.h> #include "nv50.h" int Loading @@ -46,16 +48,21 @@ nva3_hda_eld(NV50_DISP_MTHD_V1) return ret; if (size && args->v0.data[0]) { if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x61c1e0 + soff, 0x8000000d, 0x80000001); nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); } for (i = 0; i < size; i++) nv_wr32(priv, 0x61c440 + soff, (i << 8) | args->v0.data[0]); for (; i < 0x60; i++) nv_wr32(priv, 0x61c440 + soff, (i << 8)); nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000003); } else if (size) { nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000001); } else { nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000); if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x61c1e0 + soff, 0x80000001, 0x80000000); nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); } nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000 | !!size); } return 0; Loading drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c +12 −8 Original line number Diff line number Diff line Loading @@ -26,10 +26,7 @@ #include <nvif/unpack.h> #include <nvif/class.h> #include <subdev/bios.h> #include <subdev/bios/dcb.h> #include <subdev/bios/dp.h> #include <subdev/bios/init.h> #include <subdev/timer.h> #include "nv50.h" Loading @@ -40,6 +37,7 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hda_eld_v0 v0; } *args = data; const u32 soff = outp->or * 0x030; const u32 hoff = head * 0x800; int ret, i; nv_ioctl(object, "disp sor hda eld size %d\n", size); Loading @@ -51,16 +49,22 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) return ret; if (size && args->v0.data[0]) { if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x616618 + hoff, 0x8000000c, 0x80000001); nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); } nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); for (i = 0; i < size; i++) nv_wr32(priv, 0x10ec00 + soff, (i << 8) | args->v0.data[i]); for (; i < 0x60; i++) nv_wr32(priv, 0x10ec00 + soff, (i << 8)); nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000003); } else if (size) { nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000001); } else { nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000); if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x616618 + hoff, 0x80000001, 0x80000000); nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); } nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000 | !!size); } return 0; Loading drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c +0 −3 Original line number Diff line number Diff line Loading @@ -75,8 +75,5 @@ nvd0_hdmi_ctrl(NV50_DISP_MTHD_V1) /* HDMI_CTRL */ nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); /* NFI, audio doesn't work without it though.. */ nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); return 0; } drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c +0 −3 Original line number Diff line number Diff line Loading @@ -79,8 +79,5 @@ nve0_hdmi_ctrl(NV50_DISP_MTHD_V1) /* HDMI_CTRL */ nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); /* NFI, audio doesn't work without it though.. */ nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); return 0; } drivers/gpu/drm/nouveau/nv50_display.c +7 −4 Original line number Diff line number Diff line Loading @@ -1656,6 +1656,7 @@ static void nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); struct nouveau_connector *nv_connector; struct nv50_disp *disp = nv50_disp(encoder->dev); struct __packed { Loading @@ -1668,7 +1669,8 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) .base.mthd.version = 1, .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, .base.mthd.hasht = nv_encoder->dcb->hasht, .base.mthd.hashm = nv_encoder->dcb->hashm, .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) | (0x0100 << nv_crtc->index), }; nv_connector = nouveau_encoder_connector_get(nv_encoder); Loading @@ -1682,7 +1684,7 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) } static void nv50_audio_disconnect(struct drm_encoder *encoder) nv50_audio_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nv50_disp *disp = nv50_disp(encoder->dev); Loading @@ -1693,7 +1695,8 @@ nv50_audio_disconnect(struct drm_encoder *encoder) .base.version = 1, .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, .base.hasht = nv_encoder->dcb->hasht, .base.hashm = nv_encoder->dcb->hashm, .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) | (0x0100 << nv_crtc->index), }; nvif_mthd(disp->disp, 0, &args, sizeof(args)); Loading Loading @@ -1860,7 +1863,7 @@ nv50_sor_disconnect(struct drm_encoder *encoder) if (nv_crtc) { nv50_crtc_prepare(&nv_crtc->base); nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0); nv50_audio_disconnect(encoder); nv50_audio_disconnect(encoder, nv_crtc); nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc); } } Loading Loading
drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c +11 −4 Original line number Diff line number Diff line Loading @@ -26,6 +26,8 @@ #include <nvif/unpack.h> #include <nvif/class.h> #include <subdev/timer.h> #include "nv50.h" int Loading @@ -46,16 +48,21 @@ nva3_hda_eld(NV50_DISP_MTHD_V1) return ret; if (size && args->v0.data[0]) { if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x61c1e0 + soff, 0x8000000d, 0x80000001); nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); } for (i = 0; i < size; i++) nv_wr32(priv, 0x61c440 + soff, (i << 8) | args->v0.data[0]); for (; i < 0x60; i++) nv_wr32(priv, 0x61c440 + soff, (i << 8)); nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000003); } else if (size) { nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000001); } else { nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000); if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x61c1e0 + soff, 0x80000001, 0x80000000); nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); } nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000 | !!size); } return 0; Loading
drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c +12 −8 Original line number Diff line number Diff line Loading @@ -26,10 +26,7 @@ #include <nvif/unpack.h> #include <nvif/class.h> #include <subdev/bios.h> #include <subdev/bios/dcb.h> #include <subdev/bios/dp.h> #include <subdev/bios/init.h> #include <subdev/timer.h> #include "nv50.h" Loading @@ -40,6 +37,7 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hda_eld_v0 v0; } *args = data; const u32 soff = outp->or * 0x030; const u32 hoff = head * 0x800; int ret, i; nv_ioctl(object, "disp sor hda eld size %d\n", size); Loading @@ -51,16 +49,22 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) return ret; if (size && args->v0.data[0]) { if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x616618 + hoff, 0x8000000c, 0x80000001); nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); } nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); for (i = 0; i < size; i++) nv_wr32(priv, 0x10ec00 + soff, (i << 8) | args->v0.data[i]); for (; i < 0x60; i++) nv_wr32(priv, 0x10ec00 + soff, (i << 8)); nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000003); } else if (size) { nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000001); } else { nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000); if (outp->info.type == DCB_OUTPUT_DP) { nv_mask(priv, 0x616618 + hoff, 0x80000001, 0x80000000); nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); } nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000 | !!size); } return 0; Loading
drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c +0 −3 Original line number Diff line number Diff line Loading @@ -75,8 +75,5 @@ nvd0_hdmi_ctrl(NV50_DISP_MTHD_V1) /* HDMI_CTRL */ nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); /* NFI, audio doesn't work without it though.. */ nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); return 0; }
drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c +0 −3 Original line number Diff line number Diff line Loading @@ -79,8 +79,5 @@ nve0_hdmi_ctrl(NV50_DISP_MTHD_V1) /* HDMI_CTRL */ nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); /* NFI, audio doesn't work without it though.. */ nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); return 0; }
drivers/gpu/drm/nouveau/nv50_display.c +7 −4 Original line number Diff line number Diff line Loading @@ -1656,6 +1656,7 @@ static void nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); struct nouveau_connector *nv_connector; struct nv50_disp *disp = nv50_disp(encoder->dev); struct __packed { Loading @@ -1668,7 +1669,8 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) .base.mthd.version = 1, .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, .base.mthd.hasht = nv_encoder->dcb->hasht, .base.mthd.hashm = nv_encoder->dcb->hashm, .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) | (0x0100 << nv_crtc->index), }; nv_connector = nouveau_encoder_connector_get(nv_encoder); Loading @@ -1682,7 +1684,7 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) } static void nv50_audio_disconnect(struct drm_encoder *encoder) nv50_audio_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nv50_disp *disp = nv50_disp(encoder->dev); Loading @@ -1693,7 +1695,8 @@ nv50_audio_disconnect(struct drm_encoder *encoder) .base.version = 1, .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, .base.hasht = nv_encoder->dcb->hasht, .base.hashm = nv_encoder->dcb->hashm, .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) | (0x0100 << nv_crtc->index), }; nvif_mthd(disp->disp, 0, &args, sizeof(args)); Loading Loading @@ -1860,7 +1863,7 @@ nv50_sor_disconnect(struct drm_encoder *encoder) if (nv_crtc) { nv50_crtc_prepare(&nv_crtc->base); nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0); nv50_audio_disconnect(encoder); nv50_audio_disconnect(encoder, nv_crtc); nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc); } } Loading