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Commit cc247544 authored by Jagan Teki's avatar Jagan Teki Committed by Shawn Guo
Browse files

ARM: dts: i.MX6: Add BTicino i.MX6DL Mamoj initial support 



This patch adds initial support for BTicino i.MX6DL Mamoj board.

Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: default avatarSimone CIANNI <simone.cianni@bticino.it>
Signed-off-by: default avatarRaffaele RECALCATI <raffaele.recalcati@bticino.it>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 83dcec32

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -399,6 +399,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ 
	imx6dl-hummingboard2-som-v15.dtb \

	imx6dl-icore.dtb \

	imx6dl-icore-rqs.dtb \

	imx6dl-mamoj.dtb \

	imx6dl-nit6xlite.dtb \

	imx6dl-nitrogen6x.dtb \

	imx6dl-phytec-mira-rdk-nand.dtb \

arch/arm/boot/dts/imx6dl-mamoj.dts

0 → 100644
+224 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (C) 2018 BTicino

 * Copyright (C) 2018 Amarula Solutions B.V.

 */



/dts-v1/;



#include "imx6dl.dtsi"



/ {

	model = "BTicino i.MX6DL Mamoj board";

	compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "mii";

	status = "okay";

};



&i2c3 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c3>;

	status = "okay";

};



&i2c4 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c4>;

	status = "okay";



	pfuze100: pmic@8 {

		compatible = "fsl,pfuze100";

		reg = <0x08>;



		regulators {

			/* CPU vdd_arm core */

			sw1a_reg: sw1ab {

				regulator-min-microvolt = <300000>;

				regulator-max-microvolt = <1875000>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <6250>;

			};



			/* SOC vdd_soc */

			sw1c_reg: sw1c {

				regulator-min-microvolt = <300000>;

				regulator-max-microvolt = <1875000>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <6250>;

			};



			/* I/O power GEN_3V3 */

			sw2_reg: sw2 {

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};



			/* DDR memory */

			sw3a_reg: sw3a {

				regulator-min-microvolt = <400000>;

				regulator-max-microvolt = <1975000>;

				regulator-boot-on;

				regulator-always-on;

			};



			/* DDR memory */

			sw3b_reg: sw3b {

				regulator-min-microvolt = <400000>;

				regulator-max-microvolt = <1975000>;

				regulator-boot-on;

				regulator-always-on;

			};



			/* not used */

			sw4_reg: sw4 {

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <3300000>;

			};



			/* not used */

			swbst_reg: swbst {

				regulator-min-microvolt = <5000000>;

				regulator-max-microvolt = <5150000>;

			};



			/* PMIC vsnvs. EX boot mode */

			snvs_reg: vsnvs {

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <3000000>;

				regulator-boot-on;

				regulator-always-on;

			};



			vref_reg: vrefddr {

				regulator-boot-on;

				regulator-always-on;

			};



			/* not used */

			vgen1_reg: vgen1 {

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <1550000>;

			};



			/* not used */

			vgen2_reg: vgen2 {

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <1550000>;

			};



			/* not used */

			vgen3_reg: vgen3 {

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

			};



			/* 1v8 general power */

			vgen4_reg: vgen4 {

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			/* 2v8 general power IMX6 */

			vgen5_reg: vgen5 {

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			/* 3v3 Ethernet */

			vgen6_reg: vgen6 {

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};

		};

	};

};



&uart3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart3>;

	status = "okay";

};



&usdhc3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc3>;

	bus-width = <8>;

	non-removable;

	keep-power-in-suspend;

	status = "okay";

};



&iomuxc {

	pinctrl_enet: enetgrp {

		fsl,pins = <

			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0

			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b1

			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0

			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0

			MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	0x1b0b0

			MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	0x1b0b0

			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0

			MX6QDL_PAD_GPIO_19__ENET_TX_ER		0x1b0b0

			MX6QDL_PAD_GPIO_18__ENET_RX_CLK		0x1b0b1

			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0

			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0

			MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	0x1b0b0

			MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3      0x1b0b0

			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0

			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0

			MX6QDL_PAD_KEY_COL3__ENET_CRS		0x1b0b0

			MX6QDL_PAD_KEY_ROW1__ENET_COL		0x1b0b0

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1

			MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1

		>;

	};



	pinctrl_i2c4: i2c4grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_7__I2C4_SCL	0x4001b8b1

			MX6QDL_PAD_GPIO_8__I2C4_SDA	0x4001b8b1

		>;

	};



	pinctrl_uart3: uart3grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1

		>;

	};



	pinctrl_usdhc3: usdhc3grp {

		fsl,pins = <

			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059

			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059

			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059

			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059

			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059

			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059

			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059

			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059

			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059

			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059

		>;

	};

};