Commit cad73da2 authored Sep 22, 2015 by Gregory Herrero Committed by Felipe Balbi Oct 01, 2015

usb: dwc2: host: clear pending interrupts prior hibernation



If an interrupt rises during hibernation process, dwc2 will assert
interrupt line to interrupt controller. If interrupt is level
sensitive, interrupt handler will be called in a loop because dwc2
will not be able to clear it while controller is hibernated.
Thus, clear all controller interrupts before hibernation entry.

Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: John Youn <johnyoun@synopsys.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

parent 5bbf6ce0

drivers/usb/dwc2/core.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -398,6 +398,12 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
		}
		}

		/*
		* Clear any pending interrupts since dwc2 will not be able to
		* clear them after entering hibernation.
		*/
		dwc2_writel(0xffffffff, hsotg->regs + GINTSTS);

		/* Put the controller in low power state */
		pcgcctl = dwc2_readl(hsotg->regs + PCGCTL);