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Commit ca2a88f5 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
parents 3935e895 d4d4f1bf
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+8 −0
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@@ -23,6 +23,9 @@ Recommended properties :
- ti,davinci-nand-buswidth: buswidth 8 or 16
- ti,davinci-nand-use-bbt: use flash based bad block table support.

nand device bindings may contain additional sub-nodes describing
partitions of the address space. See partition.txt for more detail.

Example(da850 EVM ):
nand_cs3@62000000 {
	compatible = "ti,davinci-nand";
@@ -35,4 +38,9 @@ nand_cs3@62000000 {
	ti,davinci-ecc-mode = "hw";
	ti,davinci-ecc-bits = <4>;
	ti,davinci-nand-use-bbt;

	partition@180000 {
		label = "ubifs";
		reg = <0x180000 0x7e80000>;
	};
};
+23 −0
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* Denali NAND controller

Required properties:
  - compatible : should be "denali,denali-nand-dt"
  - reg : should contain registers location and length for data and reg.
  - reg-names: Should contain the reg names "nand_data" and "denali_reg"
  - interrupts : The interrupt number.
  - dm-mask : DMA bit mask

The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.

Examples:

nand: nand@ff900000 {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "denali,denali-nand-dt";
	reg = <0xff900000 0x100000>, <0xffb80000 0x10000>;
	reg-names = "nand_data", "denali_reg";
	interrupts = <0 144 4>;
	dma-mask = <0xffffffff>;
};
+49 −0
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FLCTL NAND controller

Required properties:
- compatible : "renesas,shmobile-flctl-sh7372"
- reg : Address range of the FLCTL
- interrupts : flste IRQ number
- nand-bus-width : bus width to NAND chip

Optional properties:
- dmas: DMA specifier(s)
- dma-names: name for each DMA specifier. Valid names are
	     "data_tx", "data_rx", "ecc_tx", "ecc_rx"

The DMA fields are not used yet in the driver but are listed here for
completing the bindings.

The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.

Example:

	flctl@e6a30000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "renesas,shmobile-flctl-sh7372";
		reg = <0xe6a30000 0x100>;
		interrupts = <0x0d80>;

		nand-bus-width = <16>;

		dmas = <&dmac 1 /* data_tx */
			&dmac 2;> /* data_rx */
		dma-names = "data_tx", "data_rx";

		system@0 {
			label = "system";
			reg = <0x0 0x8000000>;
		};

		userdata@8000000 {
			label = "userdata";
			reg = <0x8000000 0x10000000>;
		};

		cache@18000000 {
			label = "cache";
			reg = <0x18000000 0x8000000>;
		};
	};
+5 −7
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@@ -3,9 +3,7 @@
Required properties:
- compatible : "st,spear600-fsmc-nand"
- reg : Address range of the mtd chip
- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
- st,ale-off : Chip specific offset to ALE
- st,cle-off : Chip specific offset to CLE
- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"

Optional properties:
- bank-width : Width (in bytes) of the device.  If not present, the width
@@ -19,10 +17,10 @@ Example:
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0xd1800000 0x1000	/* FSMC Register */
		       0xd2000000 0x4000>;	/* NAND Base */
		reg-names = "fsmc_regs", "nand_data";
		st,ale-off = <0x20000>;
		st,cle-off = <0x10000>;
		       0xd2000000 0x0010	/* NAND Base DATA */
		       0xd2020000 0x0010	/* NAND Base ADDR */
		       0xd2010000 0x0010>;	/* NAND Base CMD */
		reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";

		bank-width = <1>;
		nand-skip-bbtscan;
+29 −0
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* MTD SPI driver for ST M25Pxx (and similar) serial flash chips

Required properties:
- #address-cells, #size-cells : Must be present if the device has sub-nodes
  representing partitions.
- compatible : Should be the manufacturer and the name of the chip. Bear in mind
               the DT binding is not Linux-only, but in case of Linux, see the
               "m25p_ids" table in drivers/mtd/devices/m25p80.c for the list of
               supported chips.
- reg : Chip-Select number
- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at

Optional properties:
- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
                   of the usual "read" opcode. This opcode is not supported by
                   all chips and support for it can not be detected at runtime.
                   Refer to your chips' datasheet to check if this is supported
                   by your chip.

Example:

	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spansion,m25p80";
		reg = <0>;
		spi-max-frequency = <40000000>;
		m25p,fast-read;
	};
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