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Commit c9e8e8d2 authored by Jiri Prchal's avatar Jiri Prchal Committed by Mark Brown
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ASoC: tlv320aic3x: extending registers cache



Adds missing register default values to cache.

Signed-off-by: default avatarJiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 784a897e
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+3 −1
Original line number Diff line number Diff line
@@ -118,7 +118,9 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = {
	0x00, 0x00, 0x00, 0x00,	/* 88 */
	0x00, 0x00, 0x00, 0x00,	/* 92 */
	0x00, 0x00, 0x00, 0x00,	/* 96 */
	0x00, 0x00, 0x02,	/* 100 */
	0x00, 0x00, 0x02, 0x00,	/* 100 */
	0x00, 0x00, 0x00, 0x00,	/* 104 */
	0x00, 0x00,            	/* 108 */
};

#define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \