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Commit c88457eb authored by Vasanthakumar Thiagarajan's avatar Vasanthakumar Thiagarajan Committed by John W. Linville
Browse files

ath9k_hw: Initialize mode registers for AR9485

parent 3050c914
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+129 −66
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@
#include "hw.h"
#include "ar9003_mac.h"
#include "ar9003_2p2_initvals.h"
#include "ar9485_initvals.h"

/* General hardware code for the AR9003 hadware family */

@@ -39,6 +40,67 @@ static bool ar9003_hw_macversion_supported(u32 macversion)
 */
static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
{
	if (AR_SREV_9485(ah)) {
		/* mac */
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
				ar9485_1_0_mac_core,
				ARRAY_SIZE(ar9485_1_0_mac_core), 2);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
				ar9485_1_0_mac_postamble,
				ARRAY_SIZE(ar9485_1_0_mac_postamble), 5);

		/* bb */
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_0,
				ARRAY_SIZE(ar9485_1_0), 2);
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
				ar9485_1_0_baseband_core,
				ARRAY_SIZE(ar9485_1_0_baseband_core), 2);
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
				ar9485_1_0_baseband_postamble,
				ARRAY_SIZE(ar9485_1_0_baseband_postamble), 5);

		/* radio */
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
				ar9485_1_0_radio_core,
				ARRAY_SIZE(ar9485_1_0_radio_core), 2);
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
				ar9485_1_0_radio_postamble,
				ARRAY_SIZE(ar9485_1_0_radio_postamble), 2);

		/* soc */
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
				ar9485_1_0_soc_preamble,
				ARRAY_SIZE(ar9485_1_0_soc_preamble), 2);
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);

		/* rx/tx gain */
		INIT_INI_ARRAY(&ah->iniModesRxGain,
				ar9485Common_rx_gain_1_0,
				ARRAY_SIZE(ar9485Common_rx_gain_1_0), 2);
		INIT_INI_ARRAY(&ah->iniModesTxGain,
				ar9485Modes_lowest_ob_db_tx_gain_1_0,
				ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
				5);

		/* Load PCIE SERDES settings from INI */

		/* Awake Setting */

		INIT_INI_ARRAY(&ah->iniPcieSerdes,
				ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1,
				ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1),
				2);

		/* Sleep Setting */

		INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
				ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1,
				ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1),
				2);
	} else {
		/* mac */
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
@@ -106,6 +168,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
				ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
				3);
	}
}

static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
{