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Commit c7b9c377 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: add debugfs to disable/enable uidle"

parents 3ea2d47e 0ef34f21

drivers/gpu/drm/msm/sde/sde_core_perf.c

+26 −1
Original line number Diff line number Diff line
@@ -513,6 +513,21 @@ static bool _sde_core_perf_is_cwb(struct drm_crtc *crtc) 
	return false;

}



static void _sde_core_perf_uidle_setup_cntr(struct sde_kms *sde_kms,

	bool enable)

{

	struct sde_hw_uidle *uidle;



	uidle = sde_kms->hw_uidle;



	SDE_EVT32(enable);

	if (uidle->ops.uidle_setup_cntr && (enable !=

			sde_kms->catalog->uidle_cfg.perf_cntr_en)) {

		uidle->ops.uidle_setup_cntr(uidle, enable);

		sde_kms->catalog->uidle_cfg.perf_cntr_en = enable;

	}

}



void sde_core_perf_crtc_update_uidle(struct drm_crtc *crtc,

	bool enable)

{
@@ -535,7 +550,7 @@ void sde_core_perf_crtc_update_uidle(struct drm_crtc *crtc, 
	mutex_lock(&sde_core_perf_lock);



	if (!kms->perf.catalog->uidle_cfg.uidle_rev ||

		!kms->perf.catalog->uidle_cfg.debugfs_ctrl) {

		(enable && !kms->perf.catalog->uidle_cfg.debugfs_ctrl)) {

		SDE_DEBUG("uidle is not enabled %d %d\n",

			kms->perf.catalog->uidle_cfg.uidle_rev,

			kms->perf.catalog->uidle_cfg.debugfs_ctrl);
@@ -564,6 +579,11 @@ void sde_core_perf_crtc_update_uidle(struct drm_crtc *crtc, 


	_sde_core_perf_enable_uidle(kms, crtc,

		(enable && !disable_uidle) ? true : false);



	/* If perf counters enabled, set them up now */

	if (kms->catalog->uidle_cfg.debugfs_perf)

		_sde_core_perf_uidle_setup_cntr(kms, enable);



exit:

	mutex_unlock(&sde_core_perf_lock);

}
@@ -1084,6 +1104,11 @@ int sde_core_perf_debugfs_init(struct sde_core_perf *perf, 
	debugfs_create_u64("fix_core_ab_vote", 0600, perf->debugfs_root,

			&perf->fix_core_ab_vote);



	debugfs_create_u32("uidle_perf_cnt", 0600, perf->debugfs_root,

			&sde_kms->catalog->uidle_cfg.debugfs_perf);

	debugfs_create_bool("uidle_enable", 0600, perf->debugfs_root,

			&sde_kms->catalog->uidle_cfg.debugfs_ctrl);



	return 0;

}

#else

drivers/gpu/drm/msm/sde/sde_core_perf.h

+12 −0
Original line number Diff line number Diff line
@@ -16,6 +16,18 @@ 


#define	SDE_PERF_DEFAULT_MAX_CORE_CLK_RATE	320000000



/**

 *  uidle performance counters mode

 * @SDE_PERF_UIDLE_DISABLE: Disable logging (default)

 * @SDE_PERF_UIDLE_CNT: Enable logging of uidle performance counters

 * @SDE_PERF_UIDLE_STATUS: Enable logging of uidle status

 * @SDE_PERF_UIDLE_MAX: Max available mode

 */

#define SDE_PERF_UIDLE_DISABLE 0x0

#define SDE_PERF_UIDLE_CNT BIT(0)

#define SDE_PERF_UIDLE_STATUS BIT(1)

#define SDE_PERF_UIDLE_MAX BIT(2)



/**

 * struct sde_core_perf_params - definition of performance parameters

 * @max_per_pipe_ib: maximum instantaneous bandwidth request

drivers/gpu/drm/msm/sde/sde_encoder.c

+54 −0
Original line number Diff line number Diff line
@@ -3260,6 +3260,56 @@ static enum sde_wb sde_encoder_get_wb(struct sde_mdss_cfg *catalog, 
	return WB_MAX;

}



void sde_encoder_perf_uidle_status(struct sde_kms *sde_kms,

	struct drm_crtc *crtc)

{

	struct sde_hw_uidle *uidle;

	struct sde_uidle_cntr cntr;

	struct sde_uidle_status status;



	if (!sde_kms || !crtc || !sde_kms->hw_uidle) {

		pr_err("invalid params %d %d\n",

			!sde_kms, !crtc);

		return;

	}



	/* check if perf counters are enabled and setup */

	if (!sde_kms->catalog->uidle_cfg.perf_cntr_en)

		return;



	uidle = sde_kms->hw_uidle;

	if ((sde_kms->catalog->uidle_cfg.debugfs_perf & SDE_PERF_UIDLE_STATUS)

			&& uidle->ops.uidle_get_status) {



		uidle->ops.uidle_get_status(uidle, &status);

		trace_sde_perf_uidle_status(

			crtc->base.id,

			status.uidle_danger_status_0,

			status.uidle_danger_status_1,

			status.uidle_safe_status_0,

			status.uidle_safe_status_1,

			status.uidle_idle_status_0,

			status.uidle_idle_status_1,

			status.uidle_fal_status_0,

			status.uidle_fal_status_1);

	}



	if ((sde_kms->catalog->uidle_cfg.debugfs_perf & SDE_PERF_UIDLE_CNT)

			&& uidle->ops.uidle_get_cntr) {



		uidle->ops.uidle_get_cntr(uidle, &cntr);

		trace_sde_perf_uidle_cntr(

			crtc->base.id,

			cntr.fal1_gate_cntr,

			cntr.fal10_gate_cntr,

			cntr.fal_wait_gate_cntr,

			cntr.fal1_num_transitions_cntr,

			cntr.fal10_num_transitions_cntr,

			cntr.min_gate_cntr,

			cntr.max_gate_cntr);

	}

}



static void sde_encoder_vblank_callback(struct drm_encoder *drm_enc,

		struct sde_encoder_phys *phy_enc)

{
@@ -3277,6 +3327,10 @@ static void sde_encoder_vblank_callback(struct drm_encoder *drm_enc, 
		sde_enc->crtc_vblank_cb(sde_enc->crtc_vblank_cb_data);

	spin_unlock_irqrestore(&sde_enc->enc_spinlock, lock_flags);



	if (phy_enc->sde_kms &&

			phy_enc->sde_kms->catalog->uidle_cfg.debugfs_perf)

		sde_encoder_perf_uidle_status(phy_enc->sde_kms, sde_enc->crtc);



	atomic_inc(&phy_enc->vsync_cnt);

	SDE_ATRACE_END("encoder_vblank_callback");

}

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+5 −0
Original line number Diff line number Diff line
@@ -743,7 +743,10 @@ struct sde_mdp_cfg { 
 * @max_fps:                maximum fps to allow micro idle

 * @uidle_rev:              uidle revision supported by the target,

 *                          zero if no support

 * @debugfs_perf:           enable/disable performance counters and status

 *                          logging

 * @debugfs_ctrl:           uidle is enabled/disabled through debugfs

 * @perf_cntr_en:           performance counters are enabled/disabled

 */

struct sde_uidle_cfg {

	SDE_HW_BLK_INFO;
@@ -758,7 +761,9 @@ struct sde_uidle_cfg { 
	u32 max_dwnscale;

	u32 max_fps;

	u32 uidle_rev;

	u32 debugfs_perf;

	bool debugfs_ctrl;

	bool perf_cntr_en;

};



/* struct sde_mdp_cfg : MDP TOP-BLK instance info

drivers/gpu/drm/msm/sde/sde_trace.h

+106 −0
Original line number Diff line number Diff line
@@ -312,6 +312,112 @@ TRACE_EVENT(sde_perf_calc_crtc, 
			__entry->core_clk_rate)

);



TRACE_EVENT(sde_perf_uidle_cntr,

	TP_PROTO(u32 crtc,

			u32 fal1_gate_cntr,

			u32 fal10_gate_cntr,

			u32 fal_wait_gate_cntr,

			u32 fal1_num_transitions_cntr,

			u32 fal10_num_transitions_cntr,

			u32 min_gate_cntr,

			u32 max_gate_cntr

			),

	TP_ARGS(crtc,

			fal1_gate_cntr,

			fal10_gate_cntr,

			fal_wait_gate_cntr,

			fal1_num_transitions_cntr,

			fal10_num_transitions_cntr,

			min_gate_cntr,

			max_gate_cntr),

	TP_STRUCT__entry(

			__field(u32, crtc)

			__field(u32, fal1_gate_cntr)

			__field(u32, fal10_gate_cntr)

			__field(u32, fal_wait_gate_cntr)

			__field(u32, fal1_num_transitions_cntr)

			__field(u32, fal10_num_transitions_cntr)

			__field(u32, min_gate_cntr)

			__field(u32, max_gate_cntr)

	),

	TP_fast_assign(

			__entry->crtc = crtc;

			__entry->fal1_gate_cntr = fal1_gate_cntr;

			__entry->fal10_gate_cntr = fal10_gate_cntr;

			__entry->fal_wait_gate_cntr = fal_wait_gate_cntr;

			__entry->fal1_num_transitions_cntr =

				fal1_num_transitions_cntr;

			__entry->fal10_num_transitions_cntr =

				fal10_num_transitions_cntr;

			__entry->min_gate_cntr = min_gate_cntr;

			__entry->max_gate_cntr = max_gate_cntr;

	),

	 TP_printk(

		"crtc:%d gate:fal1=%d fal10=%d wait=%d min=%d max=%d trns:fal1=%d fal10=%d",

			__entry->crtc,

			__entry->fal1_gate_cntr,

			__entry->fal10_gate_cntr,

			__entry->fal_wait_gate_cntr,

			__entry->min_gate_cntr,

			__entry->max_gate_cntr,

			__entry->fal1_num_transitions_cntr,

			__entry->fal10_num_transitions_cntr

			)

);



TRACE_EVENT(sde_perf_uidle_status,

	TP_PROTO(u32 crtc,

			u32 uidle_danger_status_0,

			u32 uidle_danger_status_1,

			u32 uidle_safe_status_0,

			u32 uidle_safe_status_1,

			u32 uidle_idle_status_0,

			u32 uidle_idle_status_1,

			u32 uidle_fal_status_0,

			u32 uidle_fal_status_1),

	TP_ARGS(crtc,

			uidle_danger_status_0,

			uidle_danger_status_1,

			uidle_safe_status_0,

			uidle_safe_status_1,

			uidle_idle_status_0,

			uidle_idle_status_1,

			uidle_fal_status_0,

			uidle_fal_status_1),

	TP_STRUCT__entry(

			__field(u32, crtc)

			__field(u32, uidle_danger_status_0)

			__field(u32, uidle_danger_status_1)

			__field(u32, uidle_safe_status_0)

			__field(u32, uidle_safe_status_1)

			__field(u32, uidle_idle_status_0)

			__field(u32, uidle_idle_status_1)

			__field(u32, uidle_fal_status_0)

			__field(u32, uidle_fal_status_1)),

	TP_fast_assign(

			__entry->crtc = crtc;

			__entry->uidle_danger_status_0 = uidle_danger_status_0;

			__entry->uidle_danger_status_1 = uidle_danger_status_1;

			__entry->uidle_safe_status_0 = uidle_safe_status_0;

			__entry->uidle_safe_status_1 = uidle_safe_status_1;

			__entry->uidle_idle_status_0 = uidle_idle_status_0;

			__entry->uidle_idle_status_1 = uidle_idle_status_1;

			__entry->uidle_fal_status_0 = uidle_fal_status_0;

			__entry->uidle_fal_status_1 = uidle_fal_status_1;),

	 TP_printk(

		"crtc:%d danger[%d, %d] safe[%d, %d] idle[%d, %d] fal[%d, %d]",

			__entry->crtc,

			__entry->uidle_danger_status_0,

			__entry->uidle_danger_status_1,

			__entry->uidle_safe_status_0,

			__entry->uidle_safe_status_1,

			__entry->uidle_idle_status_0,

			__entry->uidle_idle_status_1,

			__entry->uidle_fal_status_0,

			__entry->uidle_fal_status_1

			)

);



#define SDE_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)

#define SDE_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)

#define SDE_ATRACE_FUNC() SDE_ATRACE_BEGIN(__func__)